Jakob Stoklund Olesen ebba49395c Pass an explicit operand number to addLiveIns. ... Not all instructions define a virtual register in their first operand. Specifically, INLINEASM has a different format. <rdar://problem/12472811> git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@165721 91177308-0d34-0410-b5e6-96231b3b80d8		2012-10-11 16:46:07 +00:00
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ARM	Add isel patterns for v2f32 / v4f32 neon.vbsl intrinsics. rdar://12471808	2012-10-10 23:06:34 +00:00
CellSPU	Fix broken tests.	2012-10-02 15:49:34 +00:00
CPP	test commit	2012-07-18 17:53:05 +00:00
Generic	BranchProb: modify the definition of an edge in BranchProbabilityInfo to handle	2012-08-24 18:14:27 +00:00
Hexagon	LLVM Bug Fix 13709: Remove needless lsr(Rp, #32) instruction access the	2012-09-05 16:01:40 +00:00
MBlaze
Mips	Implement MipsTargetLowering::CanLowerReturn.	2012-10-10 01:27:09 +00:00
MSP430	Reapply r161633-161634 "Partition use lists so defs always come before uses.""	2012-08-10 00:21:30 +00:00
NVPTX
PowerPC	This patch addresses PR13947.	2012-10-11 15:38:20 +00:00
SPARC	Fix broken tests.	2012-10-02 15:49:34 +00:00
Thumb	Fix Thumb2 fixup kind in the integrated-as.	2012-09-01 15:06:36 +00:00
Thumb2	Add LLVM support for Swift.	2012-09-29 21:43:49 +00:00
X86	Pass an explicit operand number to addLiveIns.	2012-10-11 16:46:07 +00:00
XCore