mirror of
https://github.com/c64scene-ar/llvm-6502.git
synced 2024-12-15 04:30:12 +00:00
7c9c6ed761
Essentially the same as the GEP change in r230786.
A similar migration script can be used to update test cases, though a few more
test case improvements/changes were required this time around: (r229269-r229278)
import fileinput
import sys
import re
pat = re.compile(r"((?:=|:|^)\s*load (?:atomic )?(?:volatile )?(.*?))(| addrspace\(\d+\) *)\*($| *(?:%|@|null|undef|blockaddress|getelementptr|addrspacecast|bitcast|inttoptr|\[\[[a-zA-Z]|\{\{).*$)")
for line in sys.stdin:
sys.stdout.write(re.sub(pat, r"\1, \2\3*\4", line))
Reviewers: rafael, dexonsmith, grosser
Differential Revision: http://reviews.llvm.org/D7649
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@230794 91177308-0d34-0410-b5e6-96231b3b80d8
379 lines
9.5 KiB
LLVM
379 lines
9.5 KiB
LLVM
; Test memory-to-memory ANDs.
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;
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; RUN: llc < %s -mtriple=s390x-linux-gnu | FileCheck %s
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@g1src = global i8 1
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@g1dst = global i8 1
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@g2src = global i16 2
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@g2dst = global i16 2
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; Test the simple i8 case.
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define void @f1(i8 *%ptr1) {
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; CHECK-LABEL: f1:
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; CHECK: nc 1(1,%r2), 0(%r2)
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; CHECK: br %r14
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%ptr2 = getelementptr i8, i8 *%ptr1, i64 1
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%val = load i8 , i8 *%ptr1
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%old = load i8 , i8 *%ptr2
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%and = and i8 %val, %old
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store i8 %and, i8 *%ptr2
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ret void
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}
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; ...and again in reverse.
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define void @f2(i8 *%ptr1) {
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; CHECK-LABEL: f2:
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; CHECK: nc 1(1,%r2), 0(%r2)
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; CHECK: br %r14
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%ptr2 = getelementptr i8, i8 *%ptr1, i64 1
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%val = load i8 , i8 *%ptr1
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%old = load i8 , i8 *%ptr2
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%and = and i8 %old, %val
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store i8 %and, i8 *%ptr2
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ret void
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}
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; Test i8 cases where one value is zero-extended to 32 bits and the other
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; sign-extended.
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define void @f3(i8 *%ptr1) {
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; CHECK-LABEL: f3:
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; CHECK: nc 1(1,%r2), 0(%r2)
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; CHECK: br %r14
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%ptr2 = getelementptr i8, i8 *%ptr1, i64 1
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%val = load i8 , i8 *%ptr1
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%extval = zext i8 %val to i32
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%old = load i8 , i8 *%ptr2
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%extold = sext i8 %old to i32
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%and = and i32 %extval, %extold
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%trunc = trunc i32 %and to i8
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store i8 %trunc, i8 *%ptr2
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ret void
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}
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; ...and again with the extension types reversed.
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define void @f4(i8 *%ptr1) {
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; CHECK-LABEL: f4:
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; CHECK: nc 1(1,%r2), 0(%r2)
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; CHECK: br %r14
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%ptr2 = getelementptr i8, i8 *%ptr1, i64 1
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%val = load i8 , i8 *%ptr1
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%extval = sext i8 %val to i32
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%old = load i8 , i8 *%ptr2
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%extold = zext i8 %old to i32
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%and = and i32 %extval, %extold
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%trunc = trunc i32 %and to i8
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store i8 %trunc, i8 *%ptr2
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ret void
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}
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; ...and again with two sign extensions.
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define void @f5(i8 *%ptr1) {
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; CHECK-LABEL: f5:
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; CHECK: nc 1(1,%r2), 0(%r2)
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; CHECK: br %r14
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%ptr2 = getelementptr i8, i8 *%ptr1, i64 1
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%val = load i8 , i8 *%ptr1
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%extval = sext i8 %val to i32
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%old = load i8 , i8 *%ptr2
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%extold = sext i8 %old to i32
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%and = and i32 %extval, %extold
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%trunc = trunc i32 %and to i8
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store i8 %trunc, i8 *%ptr2
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ret void
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}
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; ...and again with two zero extensions.
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define void @f6(i8 *%ptr1) {
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; CHECK-LABEL: f6:
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; CHECK: nc 1(1,%r2), 0(%r2)
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; CHECK: br %r14
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%ptr2 = getelementptr i8, i8 *%ptr1, i64 1
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%val = load i8 , i8 *%ptr1
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%extval = zext i8 %val to i32
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%old = load i8 , i8 *%ptr2
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%extold = zext i8 %old to i32
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%and = and i32 %extval, %extold
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%trunc = trunc i32 %and to i8
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store i8 %trunc, i8 *%ptr2
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ret void
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}
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; Test i8 cases where the value is extended to 64 bits (just one case
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; this time).
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define void @f7(i8 *%ptr1) {
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; CHECK-LABEL: f7:
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; CHECK: nc 1(1,%r2), 0(%r2)
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; CHECK: br %r14
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%ptr2 = getelementptr i8, i8 *%ptr1, i64 1
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%val = load i8 , i8 *%ptr1
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%extval = sext i8 %val to i64
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%old = load i8 , i8 *%ptr2
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%extold = zext i8 %old to i64
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%and = and i64 %extval, %extold
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%trunc = trunc i64 %and to i8
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store i8 %trunc, i8 *%ptr2
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ret void
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}
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; Test the simple i16 case.
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define void @f8(i16 *%ptr1) {
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; CHECK-LABEL: f8:
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; CHECK: nc 2(2,%r2), 0(%r2)
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; CHECK: br %r14
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%ptr2 = getelementptr i16, i16 *%ptr1, i64 1
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%val = load i16 , i16 *%ptr1
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%old = load i16 , i16 *%ptr2
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%and = and i16 %val, %old
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store i16 %and, i16 *%ptr2
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ret void
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}
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; Test i16 cases where the value is extended to 32 bits.
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define void @f9(i16 *%ptr1) {
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; CHECK-LABEL: f9:
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; CHECK: nc 2(2,%r2), 0(%r2)
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; CHECK: br %r14
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%ptr2 = getelementptr i16, i16 *%ptr1, i64 1
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%val = load i16 , i16 *%ptr1
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%extval = zext i16 %val to i32
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%old = load i16 , i16 *%ptr2
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%extold = sext i16 %old to i32
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%and = and i32 %extval, %extold
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%trunc = trunc i32 %and to i16
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store i16 %trunc, i16 *%ptr2
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ret void
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}
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; Test i16 cases where the value is extended to 64 bits.
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define void @f10(i16 *%ptr1) {
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; CHECK-LABEL: f10:
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; CHECK: nc 2(2,%r2), 0(%r2)
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; CHECK: br %r14
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%ptr2 = getelementptr i16, i16 *%ptr1, i64 1
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%val = load i16 , i16 *%ptr1
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%extval = sext i16 %val to i64
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%old = load i16 , i16 *%ptr2
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%extold = zext i16 %old to i64
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%and = and i64 %extval, %extold
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%trunc = trunc i64 %and to i16
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store i16 %trunc, i16 *%ptr2
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ret void
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}
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; Test the simple i32 case.
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define void @f11(i32 *%ptr1) {
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; CHECK-LABEL: f11:
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; CHECK: nc 4(4,%r2), 0(%r2)
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; CHECK: br %r14
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%ptr2 = getelementptr i32, i32 *%ptr1, i64 1
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%val = load i32 , i32 *%ptr1
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%old = load i32 , i32 *%ptr2
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%and = and i32 %old, %val
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store i32 %and, i32 *%ptr2
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ret void
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}
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; Test i32 cases where the value is extended to 64 bits.
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define void @f12(i32 *%ptr1) {
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; CHECK-LABEL: f12:
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; CHECK: nc 4(4,%r2), 0(%r2)
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; CHECK: br %r14
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%ptr2 = getelementptr i32, i32 *%ptr1, i64 1
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%val = load i32 , i32 *%ptr1
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%extval = sext i32 %val to i64
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%old = load i32 , i32 *%ptr2
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%extold = zext i32 %old to i64
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%and = and i64 %extval, %extold
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%trunc = trunc i64 %and to i32
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store i32 %trunc, i32 *%ptr2
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ret void
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}
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; Test the i64 case.
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define void @f13(i64 *%ptr1) {
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; CHECK-LABEL: f13:
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; CHECK: nc 8(8,%r2), 0(%r2)
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; CHECK: br %r14
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%ptr2 = getelementptr i64, i64 *%ptr1, i64 1
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%val = load i64 , i64 *%ptr1
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%old = load i64 , i64 *%ptr2
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%and = and i64 %old, %val
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store i64 %and, i64 *%ptr2
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ret void
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}
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; Make sure that we don't use NC if the first load is volatile.
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define void @f14(i64 *%ptr1) {
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; CHECK-LABEL: f14:
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; CHECK-NOT: nc
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; CHECK: br %r14
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%ptr2 = getelementptr i64, i64 *%ptr1, i64 1
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%val = load volatile i64 , i64 *%ptr1
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%old = load i64 , i64 *%ptr2
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%and = and i64 %old, %val
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store i64 %and, i64 *%ptr2
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ret void
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}
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; ...likewise the second.
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define void @f15(i64 *%ptr1) {
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; CHECK-LABEL: f15:
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; CHECK-NOT: nc
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; CHECK: br %r14
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%ptr2 = getelementptr i64, i64 *%ptr1, i64 1
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%val = load i64 , i64 *%ptr1
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%old = load volatile i64 , i64 *%ptr2
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%and = and i64 %old, %val
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store i64 %and, i64 *%ptr2
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ret void
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}
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; ...likewise the store.
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define void @f16(i64 *%ptr1) {
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; CHECK-LABEL: f16:
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; CHECK-NOT: nc
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; CHECK: br %r14
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%ptr2 = getelementptr i64, i64 *%ptr1, i64 1
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%val = load i64 , i64 *%ptr1
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%old = load i64 , i64 *%ptr2
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%and = and i64 %old, %val
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store volatile i64 %and, i64 *%ptr2
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ret void
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}
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; Test that NC is not used for aligned loads and stores if there is
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; no way of telling whether they alias. We don't want to use NC in
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; cases where the addresses could be equal.
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define void @f17(i64 *%ptr1, i64 *%ptr2) {
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; CHECK-LABEL: f17:
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; CHECK-NOT: nc
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; CHECK: br %r14
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%val = load i64 , i64 *%ptr1
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%old = load i64 , i64 *%ptr2
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%and = and i64 %old, %val
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store i64 %and, i64 *%ptr2
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ret void
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}
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; ...but if one of the loads isn't aligned, we can't be sure.
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define void @f18(i64 *%ptr1, i64 *%ptr2) {
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; CHECK-LABEL: f18:
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; CHECK-NOT: nc
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; CHECK: br %r14
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%val = load i64 , i64 *%ptr1, align 2
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%old = load i64 , i64 *%ptr2
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%and = and i64 %old, %val
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store i64 %and, i64 *%ptr2
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ret void
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}
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; Repeat the previous test with the operands in the opposite order.
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define void @f19(i64 *%ptr1, i64 *%ptr2) {
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; CHECK-LABEL: f19:
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; CHECK-NOT: nc
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; CHECK: br %r14
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%val = load i64 , i64 *%ptr1, align 2
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%old = load i64 , i64 *%ptr2
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%and = and i64 %val, %old
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store i64 %and, i64 *%ptr2
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ret void
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}
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; ...and again with the other operand being unaligned.
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define void @f20(i64 *%ptr1, i64 *%ptr2) {
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; CHECK-LABEL: f20:
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; CHECK-NOT: nc
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; CHECK: br %r14
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%val = load i64 , i64 *%ptr1
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%old = load i64 , i64 *%ptr2, align 2
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%and = and i64 %val, %old
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store i64 %and, i64 *%ptr2, align 2
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ret void
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}
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; Test a case where there is definite overlap.
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define void @f21(i64 %base) {
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; CHECK-LABEL: f21:
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; CHECK-NOT: nc
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; CHECK: br %r14
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%add = add i64 %base, 1
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%ptr1 = inttoptr i64 %base to i64 *
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%ptr2 = inttoptr i64 %add to i64 *
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%val = load i64 , i64 *%ptr1
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%old = load i64 , i64 *%ptr2, align 1
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%and = and i64 %old, %val
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store i64 %and, i64 *%ptr2, align 1
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ret void
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}
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; Test that we can use NC for global addresses for i8.
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define void @f22(i8 *%ptr) {
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; CHECK-LABEL: f22:
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; CHECK-DAG: larl [[SRC:%r[0-5]]], g1src
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; CHECK-DAG: larl [[DST:%r[0-5]]], g1dst
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; CHECK: nc 0(1,[[DST]]), 0([[SRC]])
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; CHECK: br %r14
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%val = load i8 , i8 *@g1src
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%old = load i8 , i8 *@g1dst
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%and = and i8 %val, %old
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store i8 %and, i8 *@g1dst
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ret void
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}
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; Test that we use NC even where LHRL and STHRL are available.
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define void @f23(i16 *%ptr) {
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; CHECK-LABEL: f23:
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; CHECK-DAG: larl [[SRC:%r[0-5]]], g2src
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; CHECK-DAG: larl [[DST:%r[0-5]]], g2dst
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; CHECK: nc 0(2,[[DST]]), 0([[SRC]])
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; CHECK: br %r14
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%val = load i16 , i16 *@g2src
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%old = load i16 , i16 *@g2dst
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%and = and i16 %val, %old
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store i16 %and, i16 *@g2dst
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ret void
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}
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; Test a case where offset disambiguation is enough.
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define void @f24(i64 *%ptr1) {
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; CHECK-LABEL: f24:
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; CHECK: nc 8(8,%r2), 0(%r2)
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; CHECK: br %r14
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%ptr2 = getelementptr i64, i64 *%ptr1, i64 1
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%val = load i64 , i64 *%ptr1, align 1
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%old = load i64 , i64 *%ptr2, align 1
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%and = and i64 %old, %val
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store i64 %and, i64 *%ptr2, align 1
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ret void
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}
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; Test a case where TBAA tells us there is no alias.
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define void @f25(i64 *%ptr1, i64 *%ptr2) {
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; CHECK-LABEL: f25:
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; CHECK: nc 0(8,%r3), 0(%r2)
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; CHECK: br %r14
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%val = load i64 , i64 *%ptr1, align 2, !tbaa !3
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%old = load i64 , i64 *%ptr2, align 2, !tbaa !4
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%and = and i64 %old, %val
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store i64 %and, i64 *%ptr2, align 2, !tbaa !4
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ret void
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}
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; Test a case where TBAA information is present but doesn't help.
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define void @f26(i64 *%ptr1, i64 *%ptr2) {
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; CHECK-LABEL: f26:
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; CHECK-NOT: nc
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; CHECK: br %r14
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%val = load i64 , i64 *%ptr1, align 2, !tbaa !3
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%old = load i64 , i64 *%ptr2, align 2, !tbaa !3
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%and = and i64 %old, %val
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store i64 %and, i64 *%ptr2, align 2, !tbaa !3
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ret void
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}
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!0 = !{ !"root" }
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!1 = !{ !"set1", !0 }
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!2 = !{ !"set2", !0 }
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!3 = !{ !1, !1, i64 0}
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!4 = !{ !2, !2, i64 0}
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