mirror of
https://github.com/c64scene-ar/llvm-6502.git
synced 2025-01-02 07:32:52 +00:00
8eaed0f63d
This matches the format produced by the AMD proprietary driver.
//==================================================================//
// Shell script for converting .ll test cases: (Pass the .ll files
you want to convert to this script as arguments).
//==================================================================//
; This was necessary on my system so that A-Z in sed would match only
; upper case. I'm not sure why.
export LC_ALL='C'
TEST_FILES="$*"
MATCHES=`grep -v Patterns SIInstructions.td | grep -o '"[A-Z0-9_]\+["e]' | grep -o '[A-Z0-9_]\+' | sort -r`
for f in $TEST_FILES; do
# Check that there are SI tests:
grep -q -e 'verde' -e 'bonaire' -e 'SI' -e 'tahiti' $f
if [ $? -eq 0 ]; then
for match in $MATCHES; do
sed -i -e "s/\([ :]$match\)/\L\1/" $f
done
# Try to get check lines with partial instruction names
sed -i 's/\(;[ ]*SI[A-Z\\-]*: \)\([A-Z_0-9]\+\)/\1\L\2/' $f
fi
done
sed -i -e 's/bb0_1/BB0_1/g' ../../../test/CodeGen/R600/infinite-loop.ll
sed -i -e 's/SI-NOT: bfe/SI-NOT: {{[^@]}}bfe/g'../../../test/CodeGen/R600/llvm.AMDGPU.bfe.*32.ll ../../../test/CodeGen/R600/sext-in-reg.ll
sed -i -e 's/exp_IEEE/EXP_IEEE/g' ../../../test/CodeGen/R600/llvm.exp2.ll
sed -i -e 's/numVgprs/NumVgprs/g' ../../../test/CodeGen/R600/register-count-comments.ll
sed -i 's/\(; CHECK[-NOT]*: \)\([A-Z_0-9]\+\)/\1\L\2/' ../../../test/CodeGen/R600/select64.ll ../../../test/CodeGen/R600/sgpr-copy.ll
//==================================================================//
// Shell script for converting .td files (run this last)
//==================================================================//
export LC_ALL='C'
sed -i -e '/Patterns/!s/\("[A-Z0-9_]\+[ "e]\)/\L\1/g' SIInstructions.td
sed -i -e 's/"EXP/"exp/g' SIInstrInfo.td
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@221350 91177308-0d34-0410-b5e6-96231b3b80d8
346 lines
8.3 KiB
LLVM
346 lines
8.3 KiB
LLVM
;RUN: llc < %s -march=r600 -mcpu=redwood | FileCheck --check-prefix=R600 --check-prefix=FUNC %s
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;RUN: llc < %s -march=r600 -mcpu=SI -verify-machineinstrs| FileCheck --check-prefix=SI --check-prefix=FUNC %s
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; FUNC-LABEL: {{^}}setcc_v2i32:
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; R600-DAG: SETE_INT * T{{[0-9]+\.[XYZW]}}, KC0[3].X, KC0[3].Z
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; R600-DAG: SETE_INT * T{{[0-9]+\.[XYZW]}}, KC0[2].W, KC0[3].Y
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define void @setcc_v2i32(<2 x i32> addrspace(1)* %out, <2 x i32> %a, <2 x i32> %b) {
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%result = icmp eq <2 x i32> %a, %b
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%sext = sext <2 x i1> %result to <2 x i32>
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store <2 x i32> %sext, <2 x i32> addrspace(1)* %out
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ret void
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}
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; FUNC-LABEL: {{^}}setcc_v4i32:
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; R600-DAG: SETE_INT * T{{[0-9]+\.[XYZW], T[0-9]+\.[XYZW], T[0-9]+\.[XYZW]}}
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; R600-DAG: SETE_INT * T{{[0-9]+\.[XYZW], T[0-9]+\.[XYZW], T[0-9]+\.[XYZW]}}
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; R600-DAG: SETE_INT * T{{[0-9]+\.[XYZW], T[0-9]+\.[XYZW], T[0-9]+\.[XYZW]}}
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; R600-DAG: SETE_INT * T{{[0-9]+\.[XYZW], T[0-9]+\.[XYZW], T[0-9]+\.[XYZW]}}
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define void @setcc_v4i32(<4 x i32> addrspace(1)* %out, <4 x i32> addrspace(1)* %in) {
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%b_ptr = getelementptr <4 x i32> addrspace(1)* %in, i32 1
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%a = load <4 x i32> addrspace(1) * %in
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%b = load <4 x i32> addrspace(1) * %b_ptr
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%result = icmp eq <4 x i32> %a, %b
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%sext = sext <4 x i1> %result to <4 x i32>
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store <4 x i32> %sext, <4 x i32> addrspace(1)* %out
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ret void
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}
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;;;==========================================================================;;;
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;; Float comparisons
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;;;==========================================================================;;;
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; FUNC-LABEL: {{^}}f32_oeq:
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; R600: SETE_DX10
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; SI: v_cmp_eq_f32
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define void @f32_oeq(i32 addrspace(1)* %out, float %a, float %b) {
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entry:
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%0 = fcmp oeq float %a, %b
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%1 = sext i1 %0 to i32
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store i32 %1, i32 addrspace(1)* %out
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ret void
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}
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; FUNC-LABEL: {{^}}f32_ogt:
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; R600: SETGT_DX10
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; SI: v_cmp_gt_f32
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define void @f32_ogt(i32 addrspace(1)* %out, float %a, float %b) {
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entry:
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%0 = fcmp ogt float %a, %b
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%1 = sext i1 %0 to i32
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store i32 %1, i32 addrspace(1)* %out
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ret void
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}
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; FUNC-LABEL: {{^}}f32_oge:
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; R600: SETGE_DX10
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; SI: v_cmp_ge_f32
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define void @f32_oge(i32 addrspace(1)* %out, float %a, float %b) {
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entry:
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%0 = fcmp oge float %a, %b
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%1 = sext i1 %0 to i32
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store i32 %1, i32 addrspace(1)* %out
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ret void
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}
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; FUNC-LABEL: {{^}}f32_olt:
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; R600: SETGT_DX10
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; SI: v_cmp_lt_f32
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define void @f32_olt(i32 addrspace(1)* %out, float %a, float %b) {
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entry:
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%0 = fcmp olt float %a, %b
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%1 = sext i1 %0 to i32
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store i32 %1, i32 addrspace(1)* %out
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ret void
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}
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; FUNC-LABEL: {{^}}f32_ole:
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; R600: SETGE_DX10
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; SI: v_cmp_le_f32
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define void @f32_ole(i32 addrspace(1)* %out, float %a, float %b) {
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entry:
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%0 = fcmp ole float %a, %b
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%1 = sext i1 %0 to i32
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store i32 %1, i32 addrspace(1)* %out
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ret void
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}
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; FUNC-LABEL: {{^}}f32_one:
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; R600-DAG: SETE_DX10
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; R600-DAG: SETE_DX10
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; R600-DAG: AND_INT
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; R600-DAG: SETNE_DX10
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; R600-DAG: AND_INT
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; R600-DAG: SETNE_INT
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; SI: v_cmp_o_f32
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; SI: v_cmp_neq_f32
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; SI: v_cndmask_b32_e64
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; SI: v_cndmask_b32_e64
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; SI: v_and_b32_e32
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define void @f32_one(i32 addrspace(1)* %out, float %a, float %b) {
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entry:
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%0 = fcmp one float %a, %b
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%1 = sext i1 %0 to i32
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store i32 %1, i32 addrspace(1)* %out
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ret void
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}
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; FUNC-LABEL: {{^}}f32_ord:
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; R600-DAG: SETE_DX10
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; R600-DAG: SETE_DX10
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; R600-DAG: AND_INT
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; R600-DAG: SETNE_INT
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; SI: v_cmp_o_f32
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define void @f32_ord(i32 addrspace(1)* %out, float %a, float %b) {
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entry:
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%0 = fcmp ord float %a, %b
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%1 = sext i1 %0 to i32
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store i32 %1, i32 addrspace(1)* %out
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ret void
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}
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; FUNC-LABEL: {{^}}f32_ueq:
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; R600-DAG: SETNE_DX10
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; R600-DAG: SETNE_DX10
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; R600-DAG: OR_INT
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; R600-DAG: SETE_DX10
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; R600-DAG: OR_INT
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; R600-DAG: SETNE_INT
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; SI: v_cmp_u_f32
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; SI: v_cmp_eq_f32
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; SI: v_cndmask_b32_e64
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; SI: v_cndmask_b32_e64
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; SI: v_or_b32_e32
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define void @f32_ueq(i32 addrspace(1)* %out, float %a, float %b) {
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entry:
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%0 = fcmp ueq float %a, %b
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%1 = sext i1 %0 to i32
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store i32 %1, i32 addrspace(1)* %out
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ret void
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}
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; FUNC-LABEL: {{^}}f32_ugt:
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; R600: SETGE
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; R600: SETE_DX10
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; SI: v_cmp_u_f32
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; SI: v_cmp_gt_f32
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; SI: v_cndmask_b32_e64
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; SI: v_cndmask_b32_e64
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; SI: v_or_b32_e32
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define void @f32_ugt(i32 addrspace(1)* %out, float %a, float %b) {
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entry:
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%0 = fcmp ugt float %a, %b
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%1 = sext i1 %0 to i32
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store i32 %1, i32 addrspace(1)* %out
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ret void
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}
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; FUNC-LABEL: {{^}}f32_uge:
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; R600: SETGT
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; R600: SETE_DX10
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; SI: v_cmp_u_f32
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; SI: v_cmp_ge_f32
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; SI: v_cndmask_b32_e64
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; SI: v_cndmask_b32_e64
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; SI: v_or_b32_e32
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define void @f32_uge(i32 addrspace(1)* %out, float %a, float %b) {
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entry:
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%0 = fcmp uge float %a, %b
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%1 = sext i1 %0 to i32
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store i32 %1, i32 addrspace(1)* %out
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ret void
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}
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; FUNC-LABEL: {{^}}f32_ult:
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; R600: SETGE
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; R600: SETE_DX10
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; SI: v_cmp_u_f32
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; SI: v_cmp_lt_f32
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; SI: v_cndmask_b32_e64
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; SI: v_cndmask_b32_e64
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; SI: v_or_b32_e32
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define void @f32_ult(i32 addrspace(1)* %out, float %a, float %b) {
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entry:
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%0 = fcmp ult float %a, %b
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%1 = sext i1 %0 to i32
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store i32 %1, i32 addrspace(1)* %out
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ret void
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}
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; FUNC-LABEL: {{^}}f32_ule:
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; R600: SETGT
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; R600: SETE_DX10
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; SI: v_cmp_u_f32
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; SI: v_cmp_le_f32
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; SI: v_cndmask_b32_e64
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; SI: v_cndmask_b32_e64
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; SI: v_or_b32_e32
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define void @f32_ule(i32 addrspace(1)* %out, float %a, float %b) {
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entry:
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%0 = fcmp ule float %a, %b
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%1 = sext i1 %0 to i32
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store i32 %1, i32 addrspace(1)* %out
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ret void
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}
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; FUNC-LABEL: {{^}}f32_une:
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; R600: SETNE_DX10
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; SI: v_cmp_neq_f32
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define void @f32_une(i32 addrspace(1)* %out, float %a, float %b) {
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entry:
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%0 = fcmp une float %a, %b
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%1 = sext i1 %0 to i32
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store i32 %1, i32 addrspace(1)* %out
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ret void
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}
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; FUNC-LABEL: {{^}}f32_uno:
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; R600: SETNE_DX10
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; R600: SETNE_DX10
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; R600: OR_INT
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; R600: SETNE_INT
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; SI: v_cmp_u_f32
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define void @f32_uno(i32 addrspace(1)* %out, float %a, float %b) {
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entry:
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%0 = fcmp uno float %a, %b
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%1 = sext i1 %0 to i32
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store i32 %1, i32 addrspace(1)* %out
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ret void
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}
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;;;==========================================================================;;;
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;; 32-bit integer comparisons
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;;;==========================================================================;;;
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; FUNC-LABEL: {{^}}i32_eq:
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; R600: SETE_INT
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; SI: v_cmp_eq_i32
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define void @i32_eq(i32 addrspace(1)* %out, i32 %a, i32 %b) {
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entry:
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%0 = icmp eq i32 %a, %b
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%1 = sext i1 %0 to i32
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store i32 %1, i32 addrspace(1)* %out
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ret void
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}
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; FUNC-LABEL: {{^}}i32_ne:
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; R600: SETNE_INT
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; SI: v_cmp_ne_i32
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define void @i32_ne(i32 addrspace(1)* %out, i32 %a, i32 %b) {
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entry:
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%0 = icmp ne i32 %a, %b
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%1 = sext i1 %0 to i32
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store i32 %1, i32 addrspace(1)* %out
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ret void
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}
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; FUNC-LABEL: {{^}}i32_ugt:
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; R600: SETGT_UINT
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; SI: v_cmp_gt_u32
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define void @i32_ugt(i32 addrspace(1)* %out, i32 %a, i32 %b) {
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entry:
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%0 = icmp ugt i32 %a, %b
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%1 = sext i1 %0 to i32
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store i32 %1, i32 addrspace(1)* %out
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ret void
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}
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; FUNC-LABEL: {{^}}i32_uge:
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; R600: SETGE_UINT
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; SI: v_cmp_ge_u32
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define void @i32_uge(i32 addrspace(1)* %out, i32 %a, i32 %b) {
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entry:
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%0 = icmp uge i32 %a, %b
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%1 = sext i1 %0 to i32
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store i32 %1, i32 addrspace(1)* %out
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ret void
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}
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; FUNC-LABEL: {{^}}i32_ult:
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; R600: SETGT_UINT
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; SI: v_cmp_lt_u32
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define void @i32_ult(i32 addrspace(1)* %out, i32 %a, i32 %b) {
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entry:
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%0 = icmp ult i32 %a, %b
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%1 = sext i1 %0 to i32
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store i32 %1, i32 addrspace(1)* %out
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ret void
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}
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; FUNC-LABEL: {{^}}i32_ule:
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; R600: SETGE_UINT
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; SI: v_cmp_le_u32
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define void @i32_ule(i32 addrspace(1)* %out, i32 %a, i32 %b) {
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entry:
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%0 = icmp ule i32 %a, %b
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%1 = sext i1 %0 to i32
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store i32 %1, i32 addrspace(1)* %out
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ret void
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}
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; FUNC-LABEL: {{^}}i32_sgt:
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; R600: SETGT_INT
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; SI: v_cmp_gt_i32
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define void @i32_sgt(i32 addrspace(1)* %out, i32 %a, i32 %b) {
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entry:
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%0 = icmp sgt i32 %a, %b
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%1 = sext i1 %0 to i32
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store i32 %1, i32 addrspace(1)* %out
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ret void
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}
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; FUNC-LABEL: {{^}}i32_sge:
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; R600: SETGE_INT
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; SI: v_cmp_ge_i32
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define void @i32_sge(i32 addrspace(1)* %out, i32 %a, i32 %b) {
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entry:
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%0 = icmp sge i32 %a, %b
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%1 = sext i1 %0 to i32
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store i32 %1, i32 addrspace(1)* %out
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ret void
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}
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; FUNC-LABEL: {{^}}i32_slt:
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; R600: SETGT_INT
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; SI: v_cmp_lt_i32
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define void @i32_slt(i32 addrspace(1)* %out, i32 %a, i32 %b) {
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entry:
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%0 = icmp slt i32 %a, %b
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%1 = sext i1 %0 to i32
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store i32 %1, i32 addrspace(1)* %out
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ret void
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}
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; FUNC-LABEL: {{^}}i32_sle:
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; R600: SETGE_INT
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; SI: v_cmp_le_i32
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define void @i32_sle(i32 addrspace(1)* %out, i32 %a, i32 %b) {
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entry:
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%0 = icmp sle i32 %a, %b
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%1 = sext i1 %0 to i32
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store i32 %1, i32 addrspace(1)* %out
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ret void
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}
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