mirror of
https://github.com/c64scene-ar/llvm-6502.git
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fce288fc91
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@81293 91177308-0d34-0410-b5e6-96231b3b80d8
148 lines
3.4 KiB
LLVM
148 lines
3.4 KiB
LLVM
; RUN: llc < %s -march=thumb -mattr=+thumb2 | FileCheck %s
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; Test #<const>
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; var 2.1 - 0x00ab00ab
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define i32 @t2_const_var2_1_ok_1(i32 %lhs) {
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;CHECK: t2_const_var2_1_ok_1:
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;CHECK: #11206827
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%ret = add i32 %lhs, 11206827 ; 0x00ab00ab
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ret i32 %ret
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}
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define i32 @t2_const_var2_1_fail_1(i32 %lhs) {
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;CHECK: t2_const_var2_1_fail_1:
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;CHECK: movt
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%ret = add i32 %lhs, 11206843 ; 0x00ab00bb
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ret i32 %ret
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}
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define i32 @t2_const_var2_1_fail_2(i32 %lhs) {
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;CHECK: t2_const_var2_1_fail_2:
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;CHECK: movt
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%ret = add i32 %lhs, 27984043 ; 0x01ab00ab
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ret i32 %ret
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}
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define i32 @t2_const_var2_1_fail_3(i32 %lhs) {
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;CHECK: t2_const_var2_1_fail_3:
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;CHECK: movt
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%ret = add i32 %lhs, 27984299 ; 0x01ab01ab
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ret i32 %ret
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}
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define i32 @t2_const_var2_1_fail_4(i32 %lhs) {
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;CHECK: t2_const_var2_1_fail_4:
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;CHECK: movt
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%ret = add i32 %lhs, 28027649 ; 0x01abab01
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ret i32 %ret
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}
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; var 2.2 - 0xab00ab00
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define i32 @t2_const_var2_2_ok_1(i32 %lhs) {
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;CHECK: t2_const_var2_2_ok_1:
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;CHECK: #-1426019584
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%ret = add i32 %lhs, 2868947712 ; 0xab00ab00
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ret i32 %ret
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}
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define i32 @t2_const_var2_2_fail_1(i32 %lhs) {
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;CHECK: t2_const_var2_2_fail_1:
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;CHECK: movt
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%ret = add i32 %lhs, 2868951552 ; 0xab00ba00
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ret i32 %ret
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}
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define i32 @t2_const_var2_2_fail_2(i32 %lhs) {
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;CHECK: t2_const_var2_2_fail_2:
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;CHECK: movt
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%ret = add i32 %lhs, 2868947728 ; 0xab00ab10
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ret i32 %ret
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}
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define i32 @t2_const_var2_2_fail_3(i32 %lhs) {
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;CHECK: t2_const_var2_2_fail_3:
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;CHECK: movt
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%ret = add i32 %lhs, 2869996304 ; 0xab10ab10
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ret i32 %ret
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}
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define i32 @t2_const_var2_2_fail_4(i32 %lhs) {
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;CHECK: t2_const_var2_2_fail_4:
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;CHECK: movt
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%ret = add i32 %lhs, 279685904 ; 0x10abab10
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ret i32 %ret
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}
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; var 2.3 - 0xabababab
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define i32 @t2_const_var2_3_ok_1(i32 %lhs) {
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;CHECK: t2_const_var2_3_ok_1:
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;CHECK: #-1414812757
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%ret = add i32 %lhs, 2880154539 ; 0xabababab
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ret i32 %ret
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}
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define i32 @t2_const_var2_3_fail_1(i32 %lhs) {
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;CHECK: t2_const_var2_3_fail_1:
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;CHECK: movt
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%ret = add i32 %lhs, 2880154554 ; 0xabababba
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ret i32 %ret
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}
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define i32 @t2_const_var2_3_fail_2(i32 %lhs) {
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;CHECK: t2_const_var2_3_fail_2:
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;CHECK: movt
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%ret = add i32 %lhs, 2880158379 ; 0xababbaab
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ret i32 %ret
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}
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define i32 @t2_const_var2_3_fail_3(i32 %lhs) {
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;CHECK: t2_const_var2_3_fail_3:
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;CHECK: movt
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%ret = add i32 %lhs, 2881137579 ; 0xabbaabab
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ret i32 %ret
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}
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define i32 @t2_const_var2_3_fail_4(i32 %lhs) {
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;CHECK: t2_const_var2_3_fail_4:
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;CHECK: movt
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%ret = add i32 %lhs, 3131812779 ; 0xbaababab
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ret i32 %ret
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}
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; var 3 - 0x0F000000
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define i32 @t2_const_var3_1_ok_1(i32 %lhs) {
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;CHECK: t2_const_var3_1_ok_1:
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;CHECK: #251658240
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%ret = add i32 %lhs, 251658240 ; 0x0F000000
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ret i32 %ret
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}
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define i32 @t2_const_var3_2_ok_1(i32 %lhs) {
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;CHECK: t2_const_var3_2_ok_1:
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;CHECK: #3948544
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%ret = add i32 %lhs, 3948544 ; 0b00000000001111000100000000000000
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ret i32 %ret
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}
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define i32 @t2_const_var3_2_fail_1(i32 %lhs) {
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;CHECK: t2_const_var3_2_fail_1:
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;CHECK: movt
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%ret = add i32 %lhs, 3940352 ; 0b00000000001111000010000000000000
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ret i32 %ret
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}
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define i32 @t2_const_var3_3_ok_1(i32 %lhs) {
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;CHECK: t2_const_var3_3_ok_1:
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;CHECK: #258
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%ret = add i32 %lhs, 258 ; 0b00000000000000000000000100000010
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ret i32 %ret
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}
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define i32 @t2_const_var3_4_ok_1(i32 %lhs) {
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;CHECK: t2_const_var3_4_ok_1:
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;CHECK: #-268435456
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%ret = add i32 %lhs, 4026531840 ; 0xF0000000
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ret i32 %ret
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}
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