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78d63ee313
%ccr reg differently. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@991 91177308-0d34-0410-b5e6-96231b3b80d8
280 lines
7.9 KiB
C++
280 lines
7.9 KiB
C++
//===-- llvm/Target/RegInfo.h - Target Register Information ------*- C++ -*-==//
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//
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// This file is used to describe the register system of a target to the
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// register allocator.
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//
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//===----------------------------------------------------------------------===//
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#ifndef LLVM_TARGET_MACHINEREGINFO_H
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#define LLVM_TARGET_MACHINEREGINFO_H
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#include "llvm/Support/NonCopyable.h"
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#include <hash_map>
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#include <string>
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class IGNode;
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class Value;
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class LiveRangeInfo;
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class Method;
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class Instruction;
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class LiveRange;
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class AddedInstrns;
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class MachineInstr;
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class RegClass;
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class CallInst;
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class ReturnInst;
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class PhyRegAlloc;
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class BasicBlock;
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//-----------------------------------------------------------------------------
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// class MachineRegClassInfo
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//
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// Purpose:
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// Interface to description of machine register class (e.g., int reg class
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// float reg class etc)
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//
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//--------------------------------------------------------------------------
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class MachineRegClassInfo {
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protected:
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const unsigned RegClassID; // integer ID of a reg class
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const unsigned NumOfAvailRegs; // # of avail for coloring -without SP etc.
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const unsigned NumOfAllRegs; // # of all registers -including SP,g0 etc.
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public:
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inline unsigned getRegClassID() const { return RegClassID; }
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inline unsigned getNumOfAvailRegs() const { return NumOfAvailRegs; }
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inline unsigned getNumOfAllRegs() const { return NumOfAllRegs; }
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// This method should find a color which is not used by neighbors
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// (i.e., a false position in IsColorUsedArr) and
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virtual void colorIGNode(IGNode * Node, bool IsColorUsedArr[] ) const = 0;
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virtual bool isRegVolatile(const int Reg) const = 0;
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MachineRegClassInfo(const unsigned ID, const unsigned NVR,
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const unsigned NAR): RegClassID(ID), NumOfAvailRegs(NVR),
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NumOfAllRegs(NAR)
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{ } // empty constructor
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};
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//---------------------------------------------------------------------------
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// class MachineRegInfo
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//
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// Purpose:
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// Interface to register info of target machine
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//
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//--------------------------------------------------------------------------
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typedef hash_map<const MachineInstr *, AddedInstrns *> AddedInstrMapType;
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// A vector of all machine register classes
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typedef vector<const MachineRegClassInfo *> MachineRegClassArrayType;
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class MachineRegInfo : public NonCopyableV {
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protected:
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MachineRegClassArrayType MachineRegClassArr;
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public:
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// According the definition of a MachineOperand class, a Value in a
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// machine instruction can go into either a normal register or a
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// condition code register. If isCCReg is true below, the ID of the condition
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// code regiter class will be returned. Otherwise, the normal register
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// class (eg. int, float) must be returned.
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virtual unsigned getRegClassIDOfValue (const Value *const Val,
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bool isCCReg = false) const =0;
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inline unsigned int getNumOfRegClasses() const {
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return MachineRegClassArr.size();
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}
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const MachineRegClassInfo *const getMachineRegClass(unsigned i) const {
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return MachineRegClassArr[i];
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}
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// returns the register that is hardwired to zero if any (-1 if none)
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virtual inline int getZeroRegNum() const = 0;
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//virtual unsigned getRegClassIDOfValue (const Value *const Val) const = 0;
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// this method must give the exact register class of a machine operand
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// e.g, Int, Float, Int CC, Float CC
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//virtual unsigned getRCIDOfMachineOp (const MachineOperand &MO) const = 0;
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virtual void suggestRegs4MethodArgs(const Method *const Meth,
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LiveRangeInfo & LRI) const = 0;
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virtual void suggestRegs4CallArgs(const MachineInstr *const CallI,
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LiveRangeInfo& LRI, vector<RegClass *> RCL) const = 0;
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virtual void suggestReg4RetValue(const MachineInstr *const RetI,
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LiveRangeInfo& LRI) const = 0;
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virtual void colorMethodArgs(const Method *const Meth, LiveRangeInfo& LRI,
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AddedInstrns *const FirstAI) const = 0;
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virtual void colorCallArgs(const MachineInstr *const CalI,
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LiveRangeInfo& LRI, AddedInstrns *const CallAI,
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PhyRegAlloc &PRA) const = 0;
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virtual void colorRetValue(const MachineInstr *const RetI,LiveRangeInfo& LRI,
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AddedInstrns *const RetAI) const = 0;
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virtual MachineInstr *
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cpReg2RegMI(const unsigned SrcReg, const unsigned DestReg,
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const int RegType) const=0;
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virtual MachineInstr *
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cpReg2MemMI(const unsigned SrcReg, const unsigned DestPtrReg,
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const int Offset, const int RegType) const=0;
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virtual MachineInstr *
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cpMem2RegMI(const unsigned SrcPtrReg, const int Offset,
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const unsigned DestReg, const int RegType) const=0;
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virtual bool isRegVolatile(const int RegClassID, const int Reg) const=0;
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//virtual bool handleSpecialMInstr(const MachineInstr * MInst,
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// LiveRangeInfo& LRI, vector<RegClass *> RCL) const = 0;
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// returns the reg used for pushing the address when a method is called.
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// This can be used for other purposes between calls
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virtual unsigned getCallAddressReg() const = 0;
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// and when we return from a method. It should be made sure that this
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// register contains the return value when a return instruction is reached.
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virtual unsigned getReturnAddressReg() const = 0;
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virtual int getUnifiedRegNum(int RegClassID, int reg) const = 0;
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virtual const string getUnifiedRegName(int UnifiedRegNum) const = 0;
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virtual int getRegType(const LiveRange *const LR) const=0;
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virtual const Value * getCallInstRetVal(const MachineInstr *CallMI) const=0;
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inline virtual unsigned getFramePointer() const=0;
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inline virtual unsigned getStackPointer() const=0;
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inline virtual int getInvalidRegNum() const=0;
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virtual void insertCallerSavingCode(const MachineInstr *MInst,
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const BasicBlock *BB,
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PhyRegAlloc &PRA ) const = 0;
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//virtual void printReg(const LiveRange *const LR) const =0;
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MachineRegInfo() { }
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};
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#endif
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#if 0
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//---------------------------------------------------------------------------
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// class MachineRegInfo
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//
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// Purpose:
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// Interface to register info of target machine
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//
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//--------------------------------------------------------------------------
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typedef hash_map<const MachineInstr *, AddedInstrns *> AddedInstrMapType;
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// A vector of all machine register classes
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typedef vector<const MachineRegClassInfo *> MachineRegClassArrayType;
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class MachineRegInfo : public NonCopyableV {
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protected:
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MachineRegClassArrayType MachineRegClassArr;
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public:
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MachineRegInfo() {}
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// According the definition of a MachineOperand class, a Value in a
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// machine instruction can go into either a normal register or a
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// condition code register. If isCCReg is true below, the ID of the condition
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// code regiter class will be returned. Otherwise, the normal register
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// class (eg. int, float) must be returned.
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virtual unsigned getRegClassIDOfValue (const Value *const Val,
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bool isCCReg = false) const =0;
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// returns the register that is hardwired to zero if any (-1 if none)
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virtual inline int getZeroRegNum() const = 0;
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inline unsigned int getNumOfRegClasses() const {
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return MachineRegClassArr.size();
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}
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const MachineRegClassInfo *const getMachineRegClass(unsigned i) const {
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return MachineRegClassArr[i];
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}
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//virtual unsigned getRegClassIDOfValue (const Value *const Val) const = 0;
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// this method must give the exact register class of a machine operand
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// e.g, Int, Float, Int CC, Float CC
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//virtual unsigned getRCIDOfMachineOp (const MachineOperand &MO) const = 0;
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virtual void colorArgs(const Method *const Meth,
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LiveRangeInfo & LRI) const = 0;
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virtual void colorCallArgs(vector<const Instruction *> & CallInstrList,
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LiveRangeInfo& LRI,
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AddedInstrMapType& AddedInstrMap ) const = 0 ;
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virtual int getUnifiedRegNum(int RegClassID, int reg) const = 0;
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virtual const string getUnifiedRegName(int UnifiedRegNum) const = 0;
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//virtual void printReg(const LiveRange *const LR) const =0;
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};
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#endif
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