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https://github.com/c64scene-ar/llvm-6502.git
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7091b2451d
- FP_EXTEND only support extending from vectors with matching elements. This results in the scalarization of extending to v2f64 from v2f32, which will be legalized to v4f32 not matching with v2f64. - add X86-specific VFPEXT supproting extending from v4f32 to v2f64. - add BUILD_VECTOR lowering helper to recover back the original extending from v4f32 to v2f64. - test case is enhanced to include different vector width. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@161894 91177308-0d34-0410-b5e6-96231b3b80d8
57 lines
1.3 KiB
LLVM
57 lines
1.3 KiB
LLVM
; RUN: llc < %s -mtriple=x86_64-pc-linux -mcpu=corei7 | FileCheck %s
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; RUN: llc < %s -mtriple=x86_64-pc-linux -mcpu=core-avx-i | FileCheck %s --check-prefix=AVX
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define <2 x double> @v2f2d_ext_vec(<2 x float> %v1) nounwind {
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entry:
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; CHECK: v2f2d_ext_vec
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; CHECK: cvtps2pd
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; AVX: v2f2d_ext_vec
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; AVX: vcvtps2pd
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%f1 = fpext <2 x float> %v1 to <2 x double>
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ret <2 x double> %f1
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}
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define <3 x double> @v3f2d_ext_vec(<3 x float> %v1) nounwind {
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entry:
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; CHECK: v3f2d_ext_vec
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; CHECK: cvtps2pd
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; CHECK: movhlps
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; CHECK: cvtps2pd
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; AVX: v3f2d_ext_vec
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; AVX: vcvtps2pd
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; AVX: ret
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%f1 = fpext <3 x float> %v1 to <3 x double>
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ret <3 x double> %f1
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}
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define <4 x double> @v4f2d_ext_vec(<4 x float> %v1) nounwind {
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entry:
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; CHECK: v4f2d_ext_vec
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; CHECK: cvtps2pd
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; CHECK: movhlps
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; CHECK: cvtps2pd
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; AVX: v4f2d_ext_vec
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; AVX: vcvtps2pd
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; AVX: ret
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%f1 = fpext <4 x float> %v1 to <4 x double>
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ret <4 x double> %f1
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}
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define <8 x double> @v8f2d_ext_vec(<8 x float> %v1) nounwind {
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entry:
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; CHECK: v8f2d_ext_vec
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; CHECK: cvtps2pd
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; CHECK: cvtps2pd
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; CHECK: movhlps
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; CHECK: cvtps2pd
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; CHECK: movhlps
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; CHECK: cvtps2pd
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; AVX: v8f2d_ext_vec
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; AVX: vcvtps2pd
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; AVX: vextractf128
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; AVX: vcvtps2pd
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; AVX: ret
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%f1 = fpext <8 x float> %v1 to <8 x double>
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ret <8 x double> %f1
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}
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