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49683f3c96
The new target machines are: nvptx (old ptx32) => 32-bit PTX nvptx64 (old ptx64) => 64-bit PTX The sources are based on the internal NVIDIA NVPTX back-end, and contain more functionality than the current PTX back-end currently provides. NV_CONTRIB git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@156196 91177308-0d34-0410-b5e6-96231b3b80d8
92 lines
3.1 KiB
C++
92 lines
3.1 KiB
C++
//===-- NVPTXMCTargetDesc.cpp - NVPTX Target Descriptions -------*- C++ -*-===//
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//
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// The LLVM Compiler Infrastructure
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//
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// This file is distributed under the University of Illinois Open Source
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// License. See LICENSE.TXT for details.
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//
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//===----------------------------------------------------------------------===//
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//
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// This file provides NVPTX specific target descriptions.
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//
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//===----------------------------------------------------------------------===//
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#include "NVPTXMCTargetDesc.h"
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#include "NVPTXMCAsmInfo.h"
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#include "llvm/MC/MCCodeGenInfo.h"
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#include "llvm/MC/MCInstrInfo.h"
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#include "llvm/MC/MCRegisterInfo.h"
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#include "llvm/MC/MCSubtargetInfo.h"
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#include "llvm/Support/TargetRegistry.h"
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#define GET_INSTRINFO_MC_DESC
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#include "NVPTXGenInstrInfo.inc"
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#define GET_SUBTARGETINFO_MC_DESC
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#include "NVPTXGenSubtargetInfo.inc"
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#define GET_REGINFO_MC_DESC
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#include "NVPTXGenRegisterInfo.inc"
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using namespace llvm;
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static MCInstrInfo *createNVPTXMCInstrInfo() {
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MCInstrInfo *X = new MCInstrInfo();
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InitNVPTXMCInstrInfo(X);
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return X;
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}
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static MCRegisterInfo *createNVPTXMCRegisterInfo(StringRef TT) {
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MCRegisterInfo *X = new MCRegisterInfo();
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// PTX does not have a return address register.
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InitNVPTXMCRegisterInfo(X, 0);
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return X;
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}
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static MCSubtargetInfo *createNVPTXMCSubtargetInfo(StringRef TT, StringRef CPU,
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StringRef FS) {
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MCSubtargetInfo *X = new MCSubtargetInfo();
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InitNVPTXMCSubtargetInfo(X, TT, CPU, FS);
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return X;
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}
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static MCCodeGenInfo *createNVPTXMCCodeGenInfo(StringRef TT, Reloc::Model RM,
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CodeModel::Model CM,
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CodeGenOpt::Level OL) {
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MCCodeGenInfo *X = new MCCodeGenInfo();
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X->InitMCCodeGenInfo(RM, CM, OL);
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return X;
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}
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// Force static initialization.
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extern "C" void LLVMInitializeNVPTXTargetMC() {
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// Register the MC asm info.
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RegisterMCAsmInfo<NVPTXMCAsmInfo> X(TheNVPTXTarget32);
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RegisterMCAsmInfo<NVPTXMCAsmInfo> Y(TheNVPTXTarget64);
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// Register the MC codegen info.
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TargetRegistry::RegisterMCCodeGenInfo(TheNVPTXTarget32,
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createNVPTXMCCodeGenInfo);
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TargetRegistry::RegisterMCCodeGenInfo(TheNVPTXTarget64,
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createNVPTXMCCodeGenInfo);
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// Register the MC instruction info.
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TargetRegistry::RegisterMCInstrInfo(TheNVPTXTarget32, createNVPTXMCInstrInfo);
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TargetRegistry::RegisterMCInstrInfo(TheNVPTXTarget64, createNVPTXMCInstrInfo);
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// Register the MC register info.
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TargetRegistry::RegisterMCRegInfo(TheNVPTXTarget32,
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createNVPTXMCRegisterInfo);
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TargetRegistry::RegisterMCRegInfo(TheNVPTXTarget64,
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createNVPTXMCRegisterInfo);
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// Register the MC subtarget info.
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TargetRegistry::RegisterMCSubtargetInfo(TheNVPTXTarget32,
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createNVPTXMCSubtargetInfo);
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TargetRegistry::RegisterMCSubtargetInfo(TheNVPTXTarget64,
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createNVPTXMCSubtargetInfo);
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}
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