David Majnemer fdac306a12 MC: Emit COFF section flags in the "proper" order ... COFF section flags are not idempotent: 'rd' will make a read-write section because 'd' implies write 'dr' will make a read-only section because 'r' disables write git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@228490 91177308-0d34-0410-b5e6-96231b3b80d8		2015-02-07 08:26:40 +00:00
..
AArch64	AArch64: Make test more robust.	2015-02-05 23:52:14 +00:00
ARM	MC: Emit COFF section flags in the "proper" order	2015-02-07 08:26:40 +00:00
BPF
CPP
Generic
Hexagon	[Hexagon] Simplifying and formatting several patterns. Changing a pattern multiply to be expanded.	2015-02-05 21:13:25 +00:00
Inputs
Mips	[mips][microMIPS] Implement CodeGen support for SW16 and LW16 instructions	2015-02-04 15:43:17 +00:00
MSP430
NVPTX
PowerPC	[PowerPC] Handle loop predecessor invokes	2015-02-07 07:32:58 +00:00
R600	R600/SI: Amend a test to ensure WQM is enabled for LDS in pixel shaders	2015-02-06 02:51:29 +00:00
SPARC
SystemZ
Thumb
Thumb2
X86	MC: Emit COFF section flags in the "proper" order	2015-02-07 08:26:40 +00:00
XCore