Renato Golin dd34dc99fd Let t2LDRBi8 and t2LDRBi12 have same Base Pointer ... When determining if two different loads are from the same base address, this patch allows one load to use a t2LDRi8 address mode and another to use a t2LDRi12 address mode. The current implementation is very conservative and this allows the case of differing Thumb2 byte loads to be considered. Allowing these differing modes instead of forcing the exact same opcode is useful for situations where one opcodes loads from a base address+1 and a second opcode loads for a base address-1. Patch by Daniel Stewart. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@188385 91177308-0d34-0410-b5e6-96231b3b80d8		2013-08-14 16:35:29 +00:00
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AArch64	CHECK-LABEL-ify tests	2013-08-09 17:50:15 +00:00
ARM	Let t2LDRBi8 and t2LDRBi12 have same Base Pointer	2013-08-14 16:35:29 +00:00
CPP
Generic
Hexagon
Inputs
Mips	[mips] Properly parse registers that appear in inline-asm constraints.	2013-08-14 00:21:25 +00:00
MSP430
NVPTX
PowerPC	Fix FileCheck --check-prefix lines.	2013-08-12 12:43:26 +00:00
R600	R600: Set scheduling preference to Sched::Source	2013-08-12 22:33:21 +00:00
SI
SPARC
SystemZ	[SystemZ] Use CLC and IPM to implement memcmp	2013-08-12 10:28:10 +00:00
Thumb
Thumb2
X86	llvm/test/CodeGen/X86/setcc-sentinals.ll: Relax expressions for x86_64-win32.	2013-08-14 00:46:00 +00:00
XCore