Charlie Turner fdb3720f58 Fix BXJ is undefined in AArch32. ... BXJ was incorrectly said to be unsupported in ARMv8-A. It is not supported in the A64 instruction set, but it is supported in the T32 and A32 instruction sets, because it's listed as an instruction in the ARM ARM section F7.1.28. Using SP as an operand to BXJ changed from UNPREDICTABLE to PREDICTABLE in v8-A. This patch reflects that update as well. This was found by MCHammer. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@235024 91177308-0d34-0410-b5e6-96231b3b80d8		2015-04-15 17:28:23 +00:00
..
AArch64	Update tests to not be as dependent on section numbers.	2015-04-15 15:59:37 +00:00
ARM	Fix BXJ is undefined in AArch32.	2015-04-15 17:28:23 +00:00
AsmParser	Add support for .ifnes psuedo-op.	2015-03-18 14:20:54 +00:00
COFF	[opaque pointer type] Add textual IR support for explicit type parameter to gep operator	2015-03-13 18:20:45 +00:00
Disassembler	[AArch64] Allow non-standard INS/DUP encodings	2015-04-14 15:07:26 +00:00
ELF	Update tests to not be as dependent on section numbers.	2015-04-15 15:59:37 +00:00
Hexagon	Expand MUX instructions early on Hexagon	2015-03-31 13:35:12 +00:00
MachO	MC: For variable symbols, maintain MCSymbol::Section as a cache.	2015-04-03 01:46:11 +00:00
Markup
Mips	Update tests to not be as dependent on section numbers.	2015-04-15 15:59:37 +00:00
PowerPC	Update tests to not be as dependent on section numbers.	2015-04-15 15:59:37 +00:00
R600	R600/SI: Initial support for assembler and inline assembly	2015-04-08 01:09:26 +00:00
Sparc
SystemZ	[SystemZ] Support transactional execution on zEC12	2015-04-01 12:51:43 +00:00
X86	Update tests to not be as dependent on section numbers.	2015-04-15 15:59:37 +00:00