llvm-6502/lib
Jakob Stoklund Olesen fddb7667ca Replace TSFlagsFields and TSFlagsShifts with a simpler TSFlags field.
When a target instruction wants to set target-specific flags, it should simply
set bits in the TSFlags bit vector defined in the Instruction TableGen class.

This works well because TableGen resolves member references late:

class I : Instruction {
  AddrMode AM = AddrModeNone;
  let TSFlags{3-0} = AM.Value;
}

let AM = AddrMode4 in
def ADD : I;

TSFlags gets the expected bits from AddrMode4 in this example.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@100384 91177308-0d34-0410-b5e6-96231b3b80d8
2010-04-05 03:10:20 +00:00
..
Analysis
Archive
AsmParser
Bitcode
CodeGen selection dag doesn't need DwarfWriter, remove some tendrils. 2010-04-05 02:23:33 +00:00
CompilerDriver
ExecutionEngine CurFn is only used for relocations. Use EmissionDetails.MF->getFunction() instead. 2010-04-04 10:31:49 +00:00
Linker
MC eliminate the magic AbsoluteDebugSectionOffsets MAI hook, 2010-04-04 23:22:29 +00:00
Support
System
Target Replace TSFlagsFields and TSFlagsShifts with a simpler TSFlags field. 2010-04-05 03:10:20 +00:00
Transforms Reapply address space patch after fixing an issue in MemCopyOptimizer. 2010-04-04 03:10:48 +00:00
VMCore Reapply address space patch after fixing an issue in MemCopyOptimizer. 2010-04-04 03:10:48 +00:00
Makefile