Sanjoy Das fe1187ead7 [IRCE] Fix how IRCE checks for no-sign-overflow. ... IRCE requires the induction variables it handles to not sign-overflow. The current scheme of checking if sext({X,+,S}) == {sext(X),+,sext(S)} fails when SCEV simplifies sext(X) too. After this change we //also// check no-signed-wrap by looking at the flags set on the SCEVAddRecExpr. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@233102 91177308-0d34-0410-b5e6-96231b3b80d8		2015-03-24 19:29:22 +00:00
..
Analysis	Refactor: Simplify boolean expressions in lib/Analysis	2015-03-24 16:33:19 +00:00
AsmParser
Bitcode
CodeGen	Internalize the StackMapLiveness pass.	2015-03-24 13:20:54 +00:00
DebugInfo	Raising minimum required CMake version to 2.8.12.2.	2015-03-23 20:03:57 +00:00
ExecutionEngine	[Orc] Move delta-handling for trampoline sizes into the resolver block.	2015-03-24 04:27:02 +00:00
Fuzzer
IR	Verifier: Start recursing into !dbg attachments	2015-03-24 17:32:19 +00:00
IRReader
LineEditor
Linker
LTO
MC	Revert "Use std::bitset for SubtargetFeatures"	2015-03-24 12:56:59 +00:00
Object
Option	Make getLastArgNoClaim work for up to 4 arguments.	2015-03-20 23:32:58 +00:00
Passes
ProfileData	Re-sort includes with sort-includes.py and insert raw_ostream.h where it's used.	2015-03-23 19:32:43 +00:00
Support	Silencing some MSVC warnings "C4805: '^' : unsafe mix of type 'bool' and type 'unsigned int' in operation"; NFC.	2015-03-24 12:47:51 +00:00
TableGen
Target	[X86, AVX] recognize shufflevector with zero input as a vperm2 (PR22984)	2015-03-24 19:19:07 +00:00
Transforms	[IRCE] Fix how IRCE checks for no-sign-overflow.	2015-03-24 19:29:22 +00:00
CMakeLists.txt
LLVMBuild.txt
Makefile