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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@206142 91177308-0d34-0410-b5e6-96231b3b80d8
147 lines
5.4 KiB
C++
147 lines
5.4 KiB
C++
//===- llvm/CodeGen/LivePhysRegs.h - Live Physical Register Set -*- C++ -*-===//
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//
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// The LLVM Compiler Infrastructure
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//
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// This file is distributed under the University of Illinois Open Source
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// License. See LICENSE.TXT for details.
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//
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//===----------------------------------------------------------------------===//
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//
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// This file implements the LivePhysRegs utility for tracking liveness of
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// physical registers. This can be used for ad-hoc liveness tracking after
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// register allocation. You can start with the live-ins/live-outs at the
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// beginning/end of a block and update the information while walking the
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// instructions inside the block. This implementation tracks the liveness on a
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// sub-register granularity.
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//
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// We assume that the high bits of a physical super-register are not preserved
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// unless the instruction has an implicit-use operand reading the super-
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// register.
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//
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// X86 Example:
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// %YMM0<def> = ...
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// %XMM0<def> = ... (Kills %XMM0, all %XMM0s sub-registers, and %YMM0)
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//
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// %YMM0<def> = ...
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// %XMM0<def> = ..., %YMM0<imp-use> (%YMM0 and all its sub-registers are alive)
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//===----------------------------------------------------------------------===//
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#ifndef LLVM_CODEGEN_LIVE_PHYS_REGS_H
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#define LLVM_CODEGEN_LIVE_PHYS_REGS_H
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#include "llvm/ADT/SparseSet.h"
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#include "llvm/CodeGen/MachineBasicBlock.h"
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#include "llvm/Target/TargetRegisterInfo.h"
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#include <cassert>
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namespace llvm {
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class MachineInstr;
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/// \brief A set of live physical registers with functions to track liveness
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/// when walking backward/forward through a basic block.
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class LivePhysRegs {
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const TargetRegisterInfo *TRI;
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SparseSet<unsigned> LiveRegs;
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LivePhysRegs(const LivePhysRegs&) LLVM_DELETED_FUNCTION;
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LivePhysRegs &operator=(const LivePhysRegs&) LLVM_DELETED_FUNCTION;
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public:
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/// \brief Constructs a new empty LivePhysRegs set.
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LivePhysRegs() : TRI(nullptr), LiveRegs() {}
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/// \brief Constructs and initialize an empty LivePhysRegs set.
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LivePhysRegs(const TargetRegisterInfo *TRI) : TRI(TRI) {
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assert(TRI && "Invalid TargetRegisterInfo pointer.");
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LiveRegs.setUniverse(TRI->getNumRegs());
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}
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/// \brief Clear and initialize the LivePhysRegs set.
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void init(const TargetRegisterInfo *_TRI) {
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assert(_TRI && "Invalid TargetRegisterInfo pointer.");
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TRI = _TRI;
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LiveRegs.clear();
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LiveRegs.setUniverse(TRI->getNumRegs());
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}
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/// \brief Clears the LivePhysRegs set.
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void clear() { LiveRegs.clear(); }
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/// \brief Returns true if the set is empty.
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bool empty() const { return LiveRegs.empty(); }
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/// \brief Adds a physical register and all its sub-registers to the set.
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void addReg(unsigned Reg) {
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assert(TRI && "LivePhysRegs is not initialized.");
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assert(Reg <= TRI->getNumRegs() && "Expected a physical register.");
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for (MCSubRegIterator SubRegs(Reg, TRI, /*IncludeSelf=*/true);
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SubRegs.isValid(); ++SubRegs)
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LiveRegs.insert(*SubRegs);
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}
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/// \brief Removes a physical register, all its sub-registers, and all its
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/// super-registers from the set.
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void removeReg(unsigned Reg) {
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assert(TRI && "LivePhysRegs is not initialized.");
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assert(Reg <= TRI->getNumRegs() && "Expected a physical register.");
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for (MCSubRegIterator SubRegs(Reg, TRI, /*IncludeSelf=*/true);
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SubRegs.isValid(); ++SubRegs)
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LiveRegs.erase(*SubRegs);
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for (MCSuperRegIterator SuperRegs(Reg, TRI, /*IncludeSelf=*/false);
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SuperRegs.isValid(); ++SuperRegs)
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LiveRegs.erase(*SuperRegs);
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}
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/// \brief Removes physical registers clobbered by the regmask operand @p MO.
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void removeRegsInMask(const MachineOperand &MO);
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/// \brief Returns true if register @p Reg is contained in the set. This also
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/// works if only the super register of @p Reg has been defined, because we
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/// always add also all sub-registers to the set.
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bool contains(unsigned Reg) const { return LiveRegs.count(Reg); }
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/// \brief Simulates liveness when stepping backwards over an
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/// instruction(bundle): Remove Defs, add uses. This is the recommended way of
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/// calculating liveness.
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void stepBackward(const MachineInstr &MI);
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/// \brief Simulates liveness when stepping forward over an
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/// instruction(bundle): Remove killed-uses, add defs. This is the not
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/// recommended way, because it depends on accurate kill flags. If possible
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/// use stepBackwards() instead of this function.
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void stepForward(const MachineInstr &MI);
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/// \brief Adds all live-in registers of basic block @p MBB.
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void addLiveIns(const MachineBasicBlock *MBB) {
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for (MachineBasicBlock::livein_iterator LI = MBB->livein_begin(),
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LE = MBB->livein_end(); LI != LE; ++LI)
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addReg(*LI);
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}
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/// \brief Adds all live-out registers of basic block @p MBB.
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void addLiveOuts(const MachineBasicBlock *MBB) {
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for (MachineBasicBlock::const_succ_iterator SI = MBB->succ_begin(),
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SE = MBB->succ_end(); SI != SE; ++SI)
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addLiveIns(*SI);
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}
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typedef SparseSet<unsigned>::const_iterator const_iterator;
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const_iterator begin() const { return LiveRegs.begin(); }
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const_iterator end() const { return LiveRegs.end(); }
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/// \brief Prints the currently live registers to @p OS.
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void print(raw_ostream &OS) const;
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/// \brief Dumps the currently live registers to the debug output.
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void dump() const;
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};
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inline raw_ostream &operator<<(raw_ostream &OS, const LivePhysRegs& LR) {
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LR.print(OS);
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return OS;
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}
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} // namespace llvm
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#endif // LLVM_CODEGEN_LIVE_PHYS_REGS_H
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