Andrew Trick fe4d6df5c7 misched: handle scheduler that insert instructions at empty region boundaries. ...

And add comments, since this is obviously confusing.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@152445 91177308-0d34-0410-b5e6-96231b3b80d8

2012-03-09 22:34:56 +00:00

..

Analysis

Factor out the analysis of addition and subtraction in ComputeMaskedBits. Reuse

2012-03-09 09:23:50 +00:00

Archive

Avoid using an invalidated iterator.

2012-01-23 05:07:16 +00:00

AsmParser

Convert assert(0) to llvm_unreachable

2012-02-07 05:05:23 +00:00

Bitcode

Taken into account Duncan's comments for r149481 dated by 2nd Feb 2012:

2012-03-08 07:06:20 +00:00

CodeGen

misched: handle scheduler that insert instructions at empty region boundaries.

2012-03-09 22:34:56 +00:00

DebugInfo

More dead code removal (using -Wunreachable-code)

2012-01-20 21:51:11 +00:00

ExecutionEngine

Taken into account Duncan's comments for r149481 dated by 2nd Feb 2012:

2012-03-08 07:06:20 +00:00

Linker

Include cctype for isdigit. Patch by Stephen Hines.

2012-03-03 09:36:58 +00:00

MC

Make MCRegisterInfo available to the the MCInstPrinter.

2012-03-05 19:33:20 +00:00

Object

[Object]

2012-03-09 20:41:57 +00:00

Support

Add support for r600 (AMD GPUs HD2XXX - HD6XXX) target triplet.

2012-03-09 10:09:36 +00:00

TableGen

Fix infinite loop in nested multiclasses.

2012-03-07 16:39:35 +00:00

Target

Add the missing call to Error when a bad X86 scale expression is parsed.

2012-03-09 22:24:10 +00:00

Transforms

Add statistics on removed switch cases, and fix the phi statistic

2012-03-09 19:21:15 +00:00

VMCore

Taken into account Duncan's comments for r149481 dated by 2nd Feb 2012:

2012-03-08 07:06:20 +00:00

CMakeLists.txt

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LLVMBuild.txt

LLVMBuild: Introduce a common section which currently has a list of the

2011-12-12 22:45:54 +00:00

Makefile

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