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https://github.com/c64scene-ar/llvm-6502.git
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5bc21c3b57
Function @test3c should check that the DAGCombiner is able to fold a pair of shuffles into a new shuffle with a permute mask of <6,7,2,3>. However, one of the shuffles in @test3c had a wrong permute mask; this prevented the DAGCombiner from folding the shuffles into the expected result. Now that the shuffle mask is fixed, the backend correctly folds the two shuffles in function @test3c into a single movhlps instruction. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@213451 91177308-0d34-0410-b5e6-96231b3b80d8
381 lines
12 KiB
LLVM
381 lines
12 KiB
LLVM
; RUN: llc < %s -mtriple=x86_64-unknown-linux-gnu -mcpu=corei7 | FileCheck %s
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define <4 x float> @test1(<4 x float> %a, <4 x float> %b) {
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%1 = shufflevector <4 x float> %a, <4 x float> %b, <4 x i32> <i32 4, i32 1, i32 6, i32 3>
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%2 = shufflevector <4 x float> %1, <4 x float> %b, <4 x i32> <i32 0, i32 5, i32 2, i32 7>
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ret <4 x float> %2
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}
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; CHECK-LABEL: test1
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; Mask: [0,1,2,3]
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; CHECK: movaps
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; CHECK: ret
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define <4 x float> @test2(<4 x float> %a, <4 x float> %b) {
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%1 = shufflevector <4 x float> %a, <4 x float> %b, <4 x i32> <i32 0, i32 5, i32 2, i32 7>
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%2 = shufflevector <4 x float> %1, <4 x float> %b, <4 x i32> <i32 0, i32 1, i32 6, i32 3>
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ret <4 x float> %2
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}
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; CHECK-LABEL: test2
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; Mask: [0,5,6,7]
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; CHECK: movss
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; CHECK: ret
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define <4 x float> @test3(<4 x float> %a, <4 x float> %b) {
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%1 = shufflevector <4 x float> %a, <4 x float> %b, <4 x i32> <i32 0, i32 5, i32 1, i32 7>
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%2 = shufflevector <4 x float> %1, <4 x float> %b, <4 x i32> <i32 0, i32 2, i32 4, i32 1>
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ret <4 x float> %2
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}
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; CHECK-LABEL: test3
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; Mask: [0,1,4,5]
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; CHECK: movlhps
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; CHECK: ret
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define <4 x float> @test4(<4 x float> %a, <4 x float> %b) {
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%1 = shufflevector <4 x float> %a, <4 x float> %b, <4 x i32> <i32 2, i32 3, i32 5, i32 5>
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%2 = shufflevector <4 x float> %1, <4 x float> %b, <4 x i32> <i32 6, i32 7, i32 0, i32 1>
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ret <4 x float> %2
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}
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; CHECK-LABEL: test4
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; Mask: [6,7,2,3]
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; CHECK: movhlps
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; CHECK-NEXT: ret
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define <4 x float> @test5(<4 x float> %a, <4 x float> %b) {
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%1 = shufflevector <4 x float> %a, <4 x float> %b, <4 x i32> <i32 4, i32 1, i32 6, i32 3>
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%2 = shufflevector <4 x float> %1, <4 x float> %b, <4 x i32> <i32 0, i32 1, i32 2, i32 7>
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ret <4 x float> %2
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}
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; CHECK-LABEL: test5
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; Mask: [4,1,6,7]
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; CHECK: blendps $13
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; CHECK: ret
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define <4 x i32> @test6(<4 x i32> %a, <4 x i32> %b) {
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%1 = shufflevector <4 x i32> %a, <4 x i32> %b, <4 x i32> <i32 4, i32 1, i32 6, i32 3>
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%2 = shufflevector <4 x i32> %1, <4 x i32> %b, <4 x i32> <i32 0, i32 5, i32 2, i32 7>
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ret <4 x i32> %2
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}
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; CHECK-LABEL: test6
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; Mask: [4,5,6,7]
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; CHECK: movaps
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; CHECK: ret
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define <4 x i32> @test7(<4 x i32> %a, <4 x i32> %b) {
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%1 = shufflevector <4 x i32> %a, <4 x i32> %b, <4 x i32> <i32 0, i32 5, i32 2, i32 7>
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%2 = shufflevector <4 x i32> %1, <4 x i32> %b, <4 x i32> <i32 0, i32 1, i32 6, i32 3>
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ret <4 x i32> %2
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}
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; CHECK-LABEL: test7
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; Mask: [0,5,6,7]
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; CHECK: movss
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; CHECK: ret
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define <4 x i32> @test8(<4 x i32> %a, <4 x i32> %b) {
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%1 = shufflevector <4 x i32> %a, <4 x i32> %b, <4 x i32> <i32 0, i32 5, i32 1, i32 7>
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%2 = shufflevector <4 x i32> %1, <4 x i32> %b, <4 x i32> <i32 0, i32 2, i32 4, i32 1>
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ret <4 x i32> %2
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}
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; CHECK-LABEL: test8
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; Mask: [0,1,4,5]
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; CHECK: movlhps
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; CHECK: ret
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define <4 x i32> @test9(<4 x i32> %a, <4 x i32> %b) {
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%1 = shufflevector <4 x i32> %a, <4 x i32> %b, <4 x i32> <i32 2, i32 3, i32 5, i32 5>
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%2 = shufflevector <4 x i32> %1, <4 x i32> %b, <4 x i32> <i32 6, i32 7, i32 0, i32 1>
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ret <4 x i32> %2
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}
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; CHECK-LABEL: test9
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; Mask: [6,7,2,3]
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; CHECK: movhlps
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; CHECK-NEXT: ret
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define <4 x i32> @test10(<4 x i32> %a, <4 x i32> %b) {
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%1 = shufflevector <4 x i32> %a, <4 x i32> %b, <4 x i32> <i32 4, i32 1, i32 6, i32 3>
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%2 = shufflevector <4 x i32> %1, <4 x i32> %b, <4 x i32> <i32 0, i32 1, i32 2, i32 7>
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ret <4 x i32> %2
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}
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; CHECK-LABEL: test10
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; Mask: [4,1,6,7]
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; CHECK: blendps
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; CHECK: ret
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define <4 x float> @test11(<4 x float> %a, <4 x float> %b) {
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%1 = shufflevector <4 x float> %a, <4 x float> %b, <4 x i32> <i32 4, i32 1, i32 6, i32 3>
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%2 = shufflevector <4 x float> %1, <4 x float> %a, <4 x i32> <i32 4, i32 1, i32 6, i32 3>
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ret <4 x float> %2
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}
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; CHECK-LABEL: test11
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; Mask: [0,1,2,3]
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; CHECK-NOT: movaps
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; CHECK-NOT: blendps
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; CHECK: ret
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define <4 x float> @test12(<4 x float> %a, <4 x float> %b) {
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%1 = shufflevector <4 x float> %a, <4 x float> %b, <4 x i32> <i32 0, i32 5, i32 6, i32 7>
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%2 = shufflevector <4 x float> %1, <4 x float> %a, <4 x i32> <i32 4, i32 1, i32 2, i32 3>
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ret <4 x float> %2
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}
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; CHECK-LABEL: test12
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; Mask: [0,5,6,7]
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; CHECK: movss
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; CHECK: ret
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define <4 x float> @test13(<4 x float> %a, <4 x float> %b) {
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%1 = shufflevector <4 x float> %a, <4 x float> %b, <4 x i32> <i32 0, i32 1, i32 4, i32 5>
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%2 = shufflevector <4 x float> %1, <4 x float> %a, <4 x i32> <i32 4, i32 5, i32 2, i32 3>
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ret <4 x float> %2
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}
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; CHECK-LABEL: test13
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; Mask: [0,1,4,5]
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; CHECK: movlhps
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; CHECK: ret
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define <4 x float> @test14(<4 x float> %a, <4 x float> %b) {
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%1 = shufflevector <4 x float> %a, <4 x float> %b, <4 x i32> <i32 6, i32 7, i32 5, i32 5>
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%2 = shufflevector <4 x float> %1, <4 x float> %a, <4 x i32> <i32 6, i32 7, i32 0, i32 1>
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ret <4 x float> %2
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}
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; CHECK-LABEL: test14
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; Mask: [6,7,2,3]
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; CHECK: movhlps
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; CHECK: ret
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define <4 x float> @test15(<4 x float> %a, <4 x float> %b) {
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%1 = shufflevector <4 x float> %a, <4 x float> %b, <4 x i32> <i32 4, i32 1, i32 6, i32 7>
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%2 = shufflevector <4 x float> %1, <4 x float> %a, <4 x i32> <i32 0, i32 5, i32 2, i32 3>
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ret <4 x float> %2
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}
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; CHECK-LABEL: test15
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; Mask: [4,1,6,7]
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; CHECK: blendps $13
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; CHECK: ret
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define <4 x i32> @test16(<4 x i32> %a, <4 x i32> %b) {
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%1 = shufflevector <4 x i32> %a, <4 x i32> %b, <4 x i32> <i32 4, i32 1, i32 6, i32 3>
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%2 = shufflevector <4 x i32> %1, <4 x i32> %a, <4 x i32> <i32 4, i32 1, i32 6, i32 3>
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ret <4 x i32> %2
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}
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; CHECK-LABEL: test16
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; Mask: [0,1,2,3]
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; CHECK-NOT: movaps
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; CHECK-NOT: blendps
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; CHECK: ret
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define <4 x i32> @test17(<4 x i32> %a, <4 x i32> %b) {
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%1 = shufflevector <4 x i32> %a, <4 x i32> %b, <4 x i32> <i32 0, i32 5, i32 6, i32 7>
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%2 = shufflevector <4 x i32> %1, <4 x i32> %a, <4 x i32> <i32 4, i32 1, i32 2, i32 3>
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ret <4 x i32> %2
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}
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; CHECK-LABEL: test17
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; Mask: [0,5,6,7]
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; CHECK: movss
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; CHECK: ret
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define <4 x i32> @test18(<4 x i32> %a, <4 x i32> %b) {
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%1 = shufflevector <4 x i32> %a, <4 x i32> %b, <4 x i32> <i32 0, i32 1, i32 4, i32 5>
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%2 = shufflevector <4 x i32> %1, <4 x i32> %a, <4 x i32> <i32 4, i32 5, i32 2, i32 3>
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ret <4 x i32> %2
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}
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; CHECK-LABEL: test18
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; Mask: [0,1,4,5]
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; CHECK: movlhps
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; CHECK: ret
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define <4 x i32> @test19(<4 x i32> %a, <4 x i32> %b) {
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%1 = shufflevector <4 x i32> %a, <4 x i32> %b, <4 x i32> <i32 6, i32 7, i32 5, i32 5>
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%2 = shufflevector <4 x i32> %1, <4 x i32> %a, <4 x i32> <i32 6, i32 7, i32 0, i32 1>
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ret <4 x i32> %2
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}
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; CHECK-LABEL: test19
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; Mask: [6,7,2,3]
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; CHECK: movhlps
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; CHECK: ret
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define <4 x i32> @test20(<4 x i32> %a, <4 x i32> %b) {
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%1 = shufflevector <4 x i32> %a, <4 x i32> %b, <4 x i32> <i32 4, i32 1, i32 6, i32 7>
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%2 = shufflevector <4 x i32> %1, <4 x i32> %a, <4 x i32> <i32 0, i32 5, i32 2, i32 3>
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ret <4 x i32> %2
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}
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; CHECK-LABEL: test20
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; Mask: [4,1,6,7]
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; CHECK: blendps $13
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; CHECK: ret
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; Check some negative cases.
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define <4 x float> @test1b(<4 x float> %a, <4 x float> %b) {
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%1 = shufflevector <4 x float> %a, <4 x float> %b, <4 x i32> <i32 4, i32 1, i32 6, i32 3>
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%2 = shufflevector <4 x float> %1, <4 x float> %b, <4 x i32> <i32 0, i32 5, i32 2, i32 0>
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ret <4 x float> %2
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}
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; CHECK-LABEL: test1b
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; CHECK: shufps
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; CHECK: shufps
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; CHECK: ret
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define <4 x float> @test2b(<4 x float> %a, <4 x float> %b) {
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%1 = shufflevector <4 x float> %a, <4 x float> %b, <4 x i32> <i32 4, i32 1, i32 6, i32 3>
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%2 = shufflevector <4 x float> %1, <4 x float> %b, <4 x i32> <i32 0, i32 5, i32 0, i32 5>
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ret <4 x float> %2
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}
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; CHECK-LABEL: test2b
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; CHECK: shufps
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; CHECK: pshufd
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; CHECK: ret
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define <4 x float> @test3b(<4 x float> %a, <4 x float> %b) {
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%1 = shufflevector <4 x float> %a, <4 x float> %b, <4 x i32> <i32 0, i32 0, i32 6, i32 3>
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%2 = shufflevector <4 x float> %1, <4 x float> %b, <4 x i32> <i32 0, i32 7, i32 2, i32 7>
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ret <4 x float> %2
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}
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; CHECK-LABEL: test3b
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; CHECK: shufps
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; CHECK: shufps
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; CHECK: ret
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define <4 x float> @test4b(<4 x float> %a, <4 x float> %b) {
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%1 = shufflevector <4 x float> %a, <4 x float> %b, <4 x i32> <i32 4, i32 1, i32 6, i32 3>
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%2 = shufflevector <4 x float> %1, <4 x float> %b, <4 x i32> <i32 5, i32 5, i32 2, i32 7>
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ret <4 x float> %2
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}
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; CHECK-LABEL: test4b
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; CHECK: shufps
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; CHECK: shufps
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; CHECK: ret
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; Verify that we correctly fold shuffles even when we use illegal vector types.
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define <4 x i8> @test1c(<4 x i8>* %a, <4 x i8>* %b) {
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%A = load <4 x i8>* %a
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%B = load <4 x i8>* %b
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%1 = shufflevector <4 x i8> %A, <4 x i8> %B, <4 x i32> <i32 0, i32 5, i32 2, i32 7>
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%2 = shufflevector <4 x i8> %1, <4 x i8> %B, <4 x i32> <i32 0, i32 1, i32 6, i32 3>
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ret <4 x i8> %2
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}
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; CHECK-LABEL: test1c
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; Mask: [0,5,6,7]
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; CHECK: movss
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; CHECK-NEXT: ret
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define <4 x i8> @test2c(<4 x i8>* %a, <4 x i8>* %b) {
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%A = load <4 x i8>* %a
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%B = load <4 x i8>* %b
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%1 = shufflevector <4 x i8> %A, <4 x i8> %B, <4 x i32> <i32 0, i32 5, i32 1, i32 5>
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%2 = shufflevector <4 x i8> %1, <4 x i8> %B, <4 x i32> <i32 0, i32 2, i32 4, i32 1>
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ret <4 x i8> %2
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}
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; CHECK-LABEL: test2c
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; Mask: [0,1,4,5]
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; CHECK: movlhps
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; CHECK-NEXT: ret
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define <4 x i8> @test3c(<4 x i8>* %a, <4 x i8>* %b) {
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%A = load <4 x i8>* %a
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%B = load <4 x i8>* %b
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%1 = shufflevector <4 x i8> %A, <4 x i8> %B, <4 x i32> <i32 2, i32 3, i32 5, i32 5>
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%2 = shufflevector <4 x i8> %1, <4 x i8> %B, <4 x i32> <i32 6, i32 7, i32 0, i32 1>
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ret <4 x i8> %2
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}
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; CHECK-LABEL: test3c
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; Mask: [6,7,2,3]
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; CHECK: movhlps
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; CHECK-NEXT: ret
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define <4 x i8> @test4c(<4 x i8>* %a, <4 x i8>* %b) {
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%A = load <4 x i8>* %a
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%B = load <4 x i8>* %b
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%1 = shufflevector <4 x i8> %A, <4 x i8> %B, <4 x i32> <i32 4, i32 1, i32 6, i32 3>
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%2 = shufflevector <4 x i8> %1, <4 x i8> %B, <4 x i32> <i32 0, i32 1, i32 2, i32 7>
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ret <4 x i8> %2
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}
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; CHECK-LABEL: test4c
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; Mask: [4,1,6,7]
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; CHECK: blendps $13
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; CHECK: ret
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; The following test cases are generated from this C++ code
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;
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;__m128 blend_01(__m128 a, __m128 b)
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;{
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; __m128 s = a;
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; s = _mm_blend_ps( s, b, 1<<0 );
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; s = _mm_blend_ps( s, b, 1<<1 );
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; return s;
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;}
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;
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;__m128 blend_02(__m128 a, __m128 b)
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;{
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; __m128 s = a;
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; s = _mm_blend_ps( s, b, 1<<0 );
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; s = _mm_blend_ps( s, b, 1<<2 );
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; return s;
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;}
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;
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;__m128 blend_123(__m128 a, __m128 b)
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;{
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; __m128 s = a;
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; s = _mm_blend_ps( s, b, 1<<1 );
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; s = _mm_blend_ps( s, b, 1<<2 );
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; s = _mm_blend_ps( s, b, 1<<3 );
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; return s;
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;}
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; Ideally, we should collapse the following shuffles into a single one.
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define <4 x float> @blend_01(<4 x float> %a, <4 x float> %b) {
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%shuffle = shufflevector <4 x float> %a, <4 x float> %b, <4 x i32> <i32 4, i32 undef, i32 2, i32 3>
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%shuffle6 = shufflevector <4 x float> %shuffle, <4 x float> %b, <4 x i32> <i32 0, i32 5, i32 2, i32 3>
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ret <4 x float> %shuffle6
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}
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; CHECK-LABEL: blend_01
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; CHECK: movsd
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; CHECK-NEXT: ret
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define <4 x float> @blend_02(<4 x float> %a, <4 x float> %b) {
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%shuffle = shufflevector <4 x float> %a, <4 x float> %b, <4 x i32> <i32 4, i32 1, i32 undef, i32 3>
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%shuffle6 = shufflevector <4 x float> %shuffle, <4 x float> %b, <4 x i32> <i32 0, i32 1, i32 6, i32 3>
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ret <4 x float> %shuffle6
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}
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; CHECK-LABEL: blend_02
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; CHECK: blendps $5
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; CHECK-NEXT: ret
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define <4 x float> @blend_123(<4 x float> %a, <4 x float> %b) {
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%shuffle = shufflevector <4 x float> %a, <4 x float> %b, <4 x i32> <i32 0, i32 5, i32 undef, i32 undef>
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%shuffle6 = shufflevector <4 x float> %shuffle, <4 x float> %b, <4 x i32> <i32 0, i32 1, i32 6, i32 undef>
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%shuffle12 = shufflevector <4 x float> %shuffle6, <4 x float> %b, <4 x i32> <i32 0, i32 1, i32 2, i32 7>
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ret <4 x float> %shuffle12
|
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}
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|
; CHECK-LABEL: blend_123
|
|
; CHECK: movss
|
|
; CHECK: ret
|
|
|
|
define <4 x i32> @test_movhl_1(<4 x i32> %a, <4 x i32> %b) {
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|
%1 = shufflevector <4 x i32> %a, <4 x i32> %b, <4 x i32> <i32 2, i32 7, i32 5, i32 3>
|
|
%2 = shufflevector <4 x i32> %1, <4 x i32> %b, <4 x i32> <i32 6, i32 1, i32 0, i32 3>
|
|
ret <4 x i32> %2
|
|
}
|
|
; CHECK-LABEL: test_movhl_1
|
|
; CHECK: movhlps
|
|
; CHECK-NEXT: ret
|
|
|
|
define <4 x i32> @test_movhl_2(<4 x i32> %a, <4 x i32> %b) {
|
|
%1 = shufflevector <4 x i32> %a, <4 x i32> %b, <4 x i32> <i32 2, i32 0, i32 3, i32 6>
|
|
%2 = shufflevector <4 x i32> %1, <4 x i32> %b, <4 x i32> <i32 3, i32 7, i32 0, i32 2>
|
|
ret <4 x i32> %2
|
|
}
|
|
; CHECK-LABEL: test_movhl_2
|
|
; CHECK: movhlps
|
|
; CHECK-NEXT: ret
|
|
|
|
define <4 x i32> @test_movhl_3(<4 x i32> %a, <4 x i32> %b) {
|
|
%1 = shufflevector <4 x i32> %a, <4 x i32> %b, <4 x i32> <i32 7, i32 6, i32 3, i32 2>
|
|
%2 = shufflevector <4 x i32> %1, <4 x i32> %b, <4 x i32> <i32 6, i32 0, i32 3, i32 2>
|
|
ret <4 x i32> %2
|
|
}
|
|
; CHECK-LABEL: test_movhl_3
|
|
; CHECK: movhlps
|
|
; CHECK-NEXT: ret
|
|
|