llvm-6502/test/CodeGen
Vincent Lejeune fe78318614 R600: Move fabs/fneg/sel folding logic into PostProcessIsel
This move makes possible to correctly handle multiples instructions
from a single pattern.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@190643 91177308-0d34-0410-b5e6-96231b3b80d8
2013-09-12 23:44:44 +00:00
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AArch64
ARM
CPP
Generic
Hexagon
Inputs
Mips
MSP430
NVPTX
PowerPC
R600 R600: Move fabs/fneg/sel folding logic into PostProcessIsel 2013-09-12 23:44:44 +00:00
SPARC
SystemZ
Thumb
Thumb2
X86
XCore