llvm-6502

mirror of https://github.com/c64scene-ar/llvm-6502.git synced 2024-12-21 00:32:23 +00:00

History

Evan Cheng 2b4ea795a2 Added field noResults to Instruction. Currently tblgen cannot tell which operands in the operand list are results so it assumes the first one is a result. This is bad. Ideally we would fix this by separating results from inputs, e.g. (res R32:$dst), (ops R32:$src1, R32:$src2). But that's a more distruptive change. Adding 'let noResults = 1' is the workaround to tell tblgen that the instruction does not produces a result. It works for now since tblgen does not support instructions which produce multiple results. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25017 91177308-0d34-0410-b5e6-96231b3b80d8		2005-12-26 09:11:45 +00:00
..
.cvsignore
DelaySlotFiller.cpp
FPMover.cpp
Makefile
README.txt	not a good idea	2005-12-23 07:37:47 +00:00
SparcV8.h
SparcV8.td
SparcV8AsmPrinter.cpp
SparcV8InstrFormats.td
SparcV8InstrInfo.cpp
SparcV8InstrInfo.h
SparcV8InstrInfo.td	Added field noResults to Instruction.	2005-12-26 09:11:45 +00:00
SparcV8ISelDAGToDAG.cpp	fix something-o	2005-12-23 07:08:39 +00:00
SparcV8ISelSimple.cpp
SparcV8RegisterInfo.cpp	* Removed the use of FLAG. Now use hasFlagIn and hasFlagOut instead.	2005-12-23 22:14:32 +00:00
SparcV8RegisterInfo.h
SparcV8RegisterInfo.td
SparcV8TargetMachine.cpp
SparcV8TargetMachine.h

README.txt

Meta TODO list:
1. Create a new DAG -> DAG instruction selector, by adding patterns to the
   instructions.
2. ???
3. profit!

To-do
-----

* Keep the address of the constant pool in a register instead of forming its
  address all of the time.
* We can fold small constant offsets into the %hi/%lo references to constant
  pool addresses as well.