Andrew Trick feac09801b In DelayForLiveRegsBottomUp, handle instructions that read and write ... the same physical register. Simplifies the fix from the previous checkin r122211. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@122370 91177308-0d34-0410-b5e6-96231b3b80d8		2010-12-21 22:27:44 +00:00
..
Analysis	While I don't think any later transforms can fire, it seems cleaner to	2010-12-21 15:03:43 +00:00
Archive
AsmParser	Add missing standard headers. Patch by Joerg Sonnenberger!	2010-12-19 20:43:38 +00:00
Bitcode	Add missing standard headers. Patch by Joerg Sonnenberger!	2010-12-19 20:43:38 +00:00
CodeGen	In DelayForLiveRegsBottomUp, handle instructions that read and write	2010-12-21 22:27:44 +00:00
CompilerDriver	Support/PathV1: Deprecate get{Basename,Dirname,Suffix}.	2010-12-18 22:23:07 +00:00
ExecutionEngine
Linker	Fix whitespace.	2010-12-18 22:23:15 +00:00
MC	Simplify EvaluateAsAbsolute now that EvaluateAsRelocatableImpl does all	2010-12-21 20:51:42 +00:00
Object
Support	Use IntEqClasses to compute connected components of live intervals.	2010-12-21 00:48:17 +00:00
Target	Add some x86 specific dagcombines for conditional increments.	2010-12-21 21:41:44 +00:00
Transforms	GVN's Expression is not POD-like (it contains a SmallVector). Simplify code while at it.	2010-12-21 21:30:19 +00:00
VMCore	rename MVT::Flag to MVT::Glue. "Flag" is a terrible name for	2010-12-21 02:38:05 +00:00
Makefile