Benjamin Kramer feae00a68e Give the rdrand instructions a SideEffect flag and a chain so MachineCSE and MachineLICM don't touch it. ...

I already had the necessary things in place for IR-level passes but missed the machine passes.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@160137 91177308-0d34-0410-b5e6-96231b3b80d8

2012-07-12 18:14:57 +00:00

..

ARM

ARM: Fix optimizeCompare to correctly check safe condition.

2012-07-11 22:51:44 +00:00

CellSPU

Convert all tests using TCL-style quoting to use shell-style quoting.

2012-07-02 12:47:22 +00:00

CPP

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Generic

Extend TargetPassConfig to allow running only a subset of the normal passes.

2012-07-02 19:48:45 +00:00

Hexagon

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MBlaze

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Mips

Test case for r160036.

2012-07-11 19:50:46 +00:00

MSP430

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NVPTX

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PowerPC

Fix the remaining TCL-style quotes found in the testsuite. This is

2012-07-02 19:09:46 +00:00

SPARC

test/CodeGen/SPARC/private.ll: Fixup. Forgot to prune old RUN lines.

2012-07-03 04:29:20 +00:00

Thumb

Fix the remaining TCL-style quotes found in the testsuite. This is

2012-07-02 19:09:46 +00:00

Thumb2

Fix the remaining TCL-style quotes found in the testsuite. This is

2012-07-02 19:09:46 +00:00

X86

Give the rdrand instructions a SideEffect flag and a chain so MachineCSE and MachineLICM don't touch it.

2012-07-12 18:14:57 +00:00

XCore

Fix pattern for MKMSK instruction.

2012-06-13 17:59:12 +00:00