llvm-6502/test/CodeGen/XCore
Jakob Stoklund Olesen a6f7499244 Fix Mips, Sparc, and XCore tests that were dependent on register allocation.
Add an extra run with -regalloc=basic to keep them honest.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@128654 91177308-0d34-0410-b5e6-96231b3b80d8
2011-03-31 18:42:43 +00:00
..
2008-11-17-Shl64.ll
2009-01-08-Crash.ll
2009-01-14-Remat-Crash.ll
2009-03-27-v2f64-param.ll
2009-07-15-store192.ll
2010-02-25-LSR-Crash.ll
2010-04-07-DbgValueOtherTargets.ll
2011-01-31-DAGCombineBug.ll
addsub64.ll
ashr.ll
basictest.ll
bigstructret.ll
bitrev.ll
constants.ll
cos.ll
dg.exp
events.ll
exp2.ll
exp.ll
fneg.ll
getid.ll
globals.ll
indirectbr.ll
ladd_lsub_combine.ll
load.ll
log2.ll
log10.ll
log.ll
mul64.ll Fix Mips, Sparc, and XCore tests that were dependent on register allocation. 2011-03-31 18:42:43 +00:00
pow.ll
powi.ll
private.ll
ps-intrinsics.ll
resources.ll
scavenging.ll
sext.ll
sin.ll
sqrt.ll
sr-intrinsics.ll
store.ll
switch_long.ll
switch.ll
threads.ll Add XCore intrinsics for initializing / starting / synchronizing threads. 2011-03-31 15:13:13 +00:00
tls.ll
trampoline.ll
trap.ll
unaligned_load.ll
unaligned_store_combine.ll
unaligned_store.ll