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https://github.com/c64scene-ar/llvm-6502.git
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951b229ccf
This allows the fast regiser allocator to remove redundant register moves. Update a set of tests that depend on the register allocator to be linear scan. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@106420 91177308-0d34-0410-b5e6-96231b3b80d8
32 lines
790 B
LLVM
32 lines
790 B
LLVM
; RUN: llc < %s -march=cellspu -regalloc=linearscan > %t1.s
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; RUN: grep brsl %t1.s | count 1
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; RUN: grep brasl %t1.s | count 1
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; RUN: grep stqd %t1.s | count 80
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; RUN: llc < %s -march=cellspu | FileCheck %s
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target datalayout = "E-p:32:32:128-f64:64:128-f32:32:128-i64:32:128-i32:32:128-i16:16:128-i8:8:128-i1:8:128-a0:0:128-v128:128:128-s0:128:128"
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target triple = "spu"
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define i32 @main() {
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entry:
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%a = call i32 @stub_1(i32 1, float 0x400921FA00000000)
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call void @extern_stub_1(i32 %a, i32 4)
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ret i32 %a
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}
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declare void @extern_stub_1(i32, i32)
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define i32 @stub_1(i32 %x, float %y) {
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; CHECK: il $3, 0
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; CHECK: bi $lr
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entry:
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ret i32 0
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}
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; vararg call: ensure that all caller-saved registers are spilled to the
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; stack:
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define i32 @stub_2(...) {
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entry:
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ret i32 0
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}
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