mirror of
https://github.com/c64scene-ar/llvm-6502.git
synced 2024-12-13 20:32:21 +00:00
88d724909e
merge Thumb1RegisterInfo and Thumb2RegisterInfo. This will enable us to match the TargetMachine for our TargetRegisterInfo classes. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@232117 91177308-0d34-0410-b5e6-96231b3b80d8
54 lines
1.5 KiB
CMake
54 lines
1.5 KiB
CMake
set(LLVM_TARGET_DEFINITIONS ARM.td)
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tablegen(LLVM ARMGenRegisterInfo.inc -gen-register-info)
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tablegen(LLVM ARMGenInstrInfo.inc -gen-instr-info)
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tablegen(LLVM ARMGenMCCodeEmitter.inc -gen-emitter)
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tablegen(LLVM ARMGenMCPseudoLowering.inc -gen-pseudo-lowering)
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tablegen(LLVM ARMGenAsmWriter.inc -gen-asm-writer)
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tablegen(LLVM ARMGenAsmMatcher.inc -gen-asm-matcher)
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tablegen(LLVM ARMGenDAGISel.inc -gen-dag-isel)
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tablegen(LLVM ARMGenFastISel.inc -gen-fast-isel)
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tablegen(LLVM ARMGenCallingConv.inc -gen-callingconv)
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tablegen(LLVM ARMGenSubtargetInfo.inc -gen-subtarget)
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tablegen(LLVM ARMGenDisassemblerTables.inc -gen-disassembler)
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add_public_tablegen_target(ARMCommonTableGen)
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add_llvm_target(ARMCodeGen
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A15SDOptimizer.cpp
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ARMAsmPrinter.cpp
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ARMBaseInstrInfo.cpp
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ARMBaseRegisterInfo.cpp
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ARMConstantIslandPass.cpp
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ARMConstantPoolValue.cpp
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ARMExpandPseudoInsts.cpp
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ARMFastISel.cpp
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ARMFrameLowering.cpp
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ARMHazardRecognizer.cpp
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ARMISelDAGToDAG.cpp
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ARMISelLowering.cpp
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ARMInstrInfo.cpp
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ARMLoadStoreOptimizer.cpp
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ARMMCInstLower.cpp
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ARMMachineFunctionInfo.cpp
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ARMRegisterInfo.cpp
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ARMOptimizeBarriersPass.cpp
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ARMSelectionDAGInfo.cpp
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ARMSubtarget.cpp
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ARMTargetMachine.cpp
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ARMTargetObjectFile.cpp
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ARMTargetTransformInfo.cpp
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MLxExpansionPass.cpp
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Thumb1FrameLowering.cpp
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Thumb1InstrInfo.cpp
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ThumbRegisterInfo.cpp
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Thumb2ITBlockPass.cpp
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Thumb2InstrInfo.cpp
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Thumb2SizeReduction.cpp
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)
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add_subdirectory(TargetInfo)
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add_subdirectory(AsmParser)
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add_subdirectory(Disassembler)
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add_subdirectory(InstPrinter)
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add_subdirectory(MCTargetDesc)
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