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https://github.com/c64scene-ar/llvm-6502.git
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a5efeb6b39
Differential Revision: http://reviews.llvm.org/D3897 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@211346 91177308-0d34-0410-b5e6-96231b3b80d8
57 lines
1.5 KiB
LLVM
57 lines
1.5 KiB
LLVM
; Test the MSA intrinsics that are encoded with the SPECIAL instruction format.
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; RUN: llc -march=mips -mattr=+msa,+fp64 < %s | \
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; RUN: FileCheck %s --check-prefix=MIPS32
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; RUN: llc -march=mips64 -mcpu=mips64r2 -mattr=+msa,+fp64 < %s | \
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; RUN: FileCheck %s --check-prefix=MIPS64
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; RUN: llc -march=mips -mcpu=mips32r6 -mattr=+msa < %s | \
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; RUN: FileCheck %s --check-prefix=MIPS32
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; RUN: llc -march=mips64 -mcpu=mips64r6 -mattr=+msa < %s | \
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; RUN: FileCheck %s --check-prefix=MIPS64
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define i32 @llvm_mips_lsa_test(i32 %a, i32 %b) nounwind {
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entry:
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%0 = tail call i32 @llvm.mips.lsa(i32 %a, i32 %b, i32 2)
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ret i32 %0
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}
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declare i32 @llvm.mips.lsa(i32, i32, i32) nounwind
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; MIPS32: llvm_mips_lsa_test:
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; MIPS32: lsa {{\$[0-9]+}}, $5, $4, 2
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; MIPS32: .size llvm_mips_lsa_test
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define i32 @lsa_test(i32 %a, i32 %b) nounwind {
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entry:
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%0 = shl i32 %b, 2
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%1 = add i32 %a, %0
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ret i32 %1
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}
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; MIPS32: lsa_test:
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; MIPS32: lsa {{\$[0-9]+}}, $5, $4, 2
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; MIPS32: .size lsa_test
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define i64 @llvm_mips_dlsa_test(i64 %a, i64 %b) nounwind {
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entry:
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%0 = tail call i64 @llvm.mips.dlsa(i64 %a, i64 %b, i32 2)
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ret i64 %0
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}
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declare i64 @llvm.mips.dlsa(i64, i64, i32) nounwind
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; MIPS64: llvm_mips_dlsa_test:
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; MIPS64: dlsa {{\$[0-9]+}}, $5, $4, 2
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; MIPS64: .size llvm_mips_dlsa_test
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define i64 @dlsa_test(i64 %a, i64 %b) nounwind {
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entry:
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%0 = shl i64 %b, 2
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%1 = add i64 %a, %0
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ret i64 %1
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}
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; MIPS64: dlsa_test:
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; MIPS64: dlsa {{\$[0-9]+}}, $5, $4, 2
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; MIPS64: .size dlsa_test
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