LLVM backend for 6502
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Juergen Ributzka ffbd4879eb [FastISel][AArch64] Fold 'AND' instruction during the address computation.
The 'AND' instruction could be used to mask out the lower 32 bits of a register.
If this is done inside an address computation we might be able to fold the
instruction into the memory instruction itself.

and  x1, x1, #0xffffffff   ---> ldrb x0, [x0, w1, uxtw]
ldrb x0, [x0, x1]

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@218030 91177308-0d34-0410-b5e6-96231b3b80d8
2014-09-18 05:40:41 +00:00
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bindings Reinstate "Nuke the old JIT." 2014-09-02 22:28:02 +00:00
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docs [docs] Mention character array constants in docs/LangRef.rst 2014-09-11 12:02:59 +00:00
examples Add doInitialization/doFinalization to DataLayoutPass. 2014-09-10 21:27:43 +00:00
include Add a new pass FunctionTargetTransformInfo. This pass serves as a 2014-09-18 00:34:14 +00:00
lib [FastISel][AArch64] Fold 'AND' instruction during the address computation. 2014-09-18 05:40:41 +00:00
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test [FastISel][AArch64] Fold 'AND' instruction during the address computation. 2014-09-18 05:40:41 +00:00
tools llvm-cov: Push some more debug output into the View (NFC) 2014-09-17 21:48:52 +00:00
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Low Level Virtual Machine (LLVM)
================================

This directory and its subdirectories contain source code for the Low Level
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