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in the Intel syntax. The MC layer supports emitting in the Intel syntax, but this would require the inline assembly MachineInstr to be lowered to an MCInst before emission. This is potential future work, but for now emitting directly from the MachineInstr suffices. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@165173 91177308-0d34-0410-b5e6-96231b3b80d8 |
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ARM | ||
CellSPU | ||
CPP | ||
Generic | ||
Hexagon | ||
MBlaze | ||
Mips | ||
MSP430 | ||
NVPTX | ||
PowerPC | ||
SPARC | ||
Thumb | ||
Thumb2 | ||
X86 | ||
XCore |