Arnold Schwaighofer ffd3bb8f0d ARM: Fix incorrect pack pattern ... A "pkhtb x, x, y asr #num" uses the lower 16 bits of "y asr #num" and packs them in the bottom half of "x". An arithmetic and logic shift are only equivalent in this context if the shift amount is 16. We would be shifting in ones into the bottom 16bits instead of zeros if "y" is negative. radar://14338767 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@185712 91177308-0d34-0410-b5e6-96231b3b80d8		2013-07-05 18:28:39 +00:00
..
AArch64	AArch64: correct CodeGen of MOVZ/MOVK combinations.	2013-07-01 19:23:10 +00:00
ARM	ARM: Fix incorrect pack pattern	2013-07-05 18:28:39 +00:00
CPP
Generic	Debug Info: clean up usage of Verify.	2013-06-28 05:43:10 +00:00
Hexagon
Inputs
MBlaze
Mips	[mips] Fix test case to check that mips64 instructions are generated.	2013-07-01 20:18:58 +00:00
MSP430	Really fix the test. Sorry for the breakage...	2013-07-01 19:51:36 +00:00
NVPTX	[NVPTX] Add support for module-scope inline asm	2013-07-01 13:00:14 +00:00
PowerPC	[PowerPC] Use mtocrf when available	2013-07-03 17:59:07 +00:00
R600	Prefix failing commands with not to make clear they are expected to fail.	2013-07-03 16:41:29 +00:00
SI
SPARC	Switch spill weights from a basic loop depth estimation to BlockFrequencyInfo.	2013-06-17 19:00:36 +00:00
SystemZ	[SystemZ] Remove no-op MVCs	2013-07-05 14:38:48 +00:00
Thumb
Thumb2	ARM: allow predicated barriers in Thumb mode	2013-06-26 16:52:32 +00:00
X86	Prefix failing commands with not to make clear they are expected to fail.	2013-07-03 16:41:29 +00:00
XCore	[XCore] Add ISel pattern for LDWCP	2013-07-03 07:48:50 +00:00