Add 6502 instruction set explanation

Damián Silvani 2015-08-05 21:45:25 -03:00
parent 68c9b9169e
commit f84ced2d4e

@ -11,8 +11,9 @@ Welcome to the llvm-6502 wiki!
## Links of interest
- [Creating an LLVM Backend for the Cpu0 Architecture](http://jonathan2251.github.io/lbd)
- [Design and Implementation of a TriCore Backend](https://opus4.kobv.de/opus4-fau/files/1108/tricore_llvm.pdf)
- [avr-llvm: AVR Backend](https://github.com/avr-llvm/llvm)
- [Creating an LLVM Backend for the Cpu0 Architecture](http://jonathan2251.github.io/lbd)
- [The 6502/65C02/65C816 Instruction Set Decoded](http://www.llx.com/~nparker/a2/opcodes.html)
- [Thread: [LLVMdev] MOS6502 target](https://groups.google.com/d/msg/llvm-dev/w37MfNU_Ag8/LdiDNHgjpGEJ)
- [Thread: A GCC backend for the 6502?](http://forum.6502.org/viewtopic.php?t=1476)