diff --git a/lib/Target/WDC65816/WDC65816ISelLowering.cpp b/lib/Target/WDC65816/WDC65816ISelLowering.cpp
index 2caa6944..04dc3b8f 100644
--- a/lib/Target/WDC65816/WDC65816ISelLowering.cpp
+++ b/lib/Target/WDC65816/WDC65816ISelLowering.cpp
@@ -811,10 +811,16 @@ WDC65816TargetLowering::WDC65816TargetLowering(TargetMachine &TM)
 : TargetLowering(TM, new TargetLoweringObjectFileELF()) {
     
     addRegisterClass(MVT::i16, &WDC::Int16RegsRegClass);
+#if 0 // WDC_TODO - turn these off for now...
+      // The problem here is that if LLVM thinks we have 32bit and 64bit registers
+      // then it insists on promoting ints to 32-bit even though we have said we are
+      // natively a 16-bit machine.  Also, I haven't bothered to tell LLVM yet how to
+      // load values into these registers which I think confuses it.  So, off for now.
     addRegisterClass(MVT::i32, &WDC::Int32RegsRegClass);
     addRegisterClass(MVT::i64, &WDC::Int64RegsRegClass);
     addRegisterClass(MVT::f32, &WDC::Float32RegsRegClass);
     addRegisterClass(MVT::f64, &WDC::Float64RegsRegClass);
+#endif
     
     computeRegisterProperties();
 #if 0 // WDC_TODO - For sure we need something here...
diff --git a/lib/Target/WDC65816/WDC65816Subtarget.h b/lib/Target/WDC65816/WDC65816Subtarget.h
index fde227b4..b53fefaf 100644
--- a/lib/Target/WDC65816/WDC65816Subtarget.h
+++ b/lib/Target/WDC65816/WDC65816Subtarget.h
@@ -37,7 +37,7 @@ namespace llvm {
         
         bool is64Bit() const { return false; }
         std::string getDataLayout() const {
-            return std::string("e-p:32:8:8-i16:8:8-f32:8:8-f68:8:8-n16");
+            return std::string("e-p:32:8:8-i8:8:8-i16:8:8-i32:8:8-f32:8:8-f64:8:8-n16:8");
         }
         
 #if 0 // WDC_TODO - do I need any of this?