More fixes to the instruction definitions to try to get the build working.
This commit is contained in:
Jeremy Rand
parent
727ae91f80
commit
51e5e090e2
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@ -32,21 +32,22 @@ include "WDC65816InstrFormats.td"
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//def ADDRabsl : ComplexPattern<i32, 1, "SelectAbsLong", [], []>;
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//def ADDRdp : ComplexPattern<i8, 1, "SelectDirectPage", [], []>;
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def addr : ComplexPattern<iPTR, 5, "SelectAddr", [], [SDNPWantParent]>;
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// Address operands
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def ADDRabs : Operand<iPTR> {
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let PrintMethod = "printMemOperand";
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let MIOperandInfo = (ops ptr_rc, ptr_rc);
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//let MIOperandInfo = (ops ptr_rc, ptr_rc);
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}
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def ADDRabsl : Operand<iPTR> {
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let PrintMethod = "printMemOperand";
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let MIOperandInfo = (ops ptr_rc, ptr_rc);
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//let MIOperandInfo = (ops ptr_rc, ptr_rc);
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}
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def ADDRdp : Operand<iPTR> {
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let PrintMethod = "printMemOperand";
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let MIOperandInfo = (ops ptr_rc, ptr_rc);
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//let MIOperandInfo = (ops ptr_rc, ptr_rc);
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}
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//===----------------------------------------------------------------------===//
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@ -77,22 +78,22 @@ def ADDRdp : Operand<iPTR> {
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def ADCimm : Group1<OpGrp1ADC, AddrModeGrp1Imm,
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(outs AccRegs:$dst), (ins AccRegs:$src1, i16imm:$src2),
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"ADC #>$src2",
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[(set AccRegs:$dst, (add AccRegs:$src1, i16imm:$src2))]>;
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[(set AccRegs:$dst, (add AccRegs:$src1, i16:$src2))]>;
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def ADCabs : Group1<OpGrp1ADC, AddrModeGrp1Abs,
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(outs AccRegs:$dst), (ins AccRegs:$src1, ADDRabs:$src2),
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"ADC |$src2",
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[(set AccRegs:$dst, (add AccRegs:$src1, (load ADDRabs:$src2)))]>;
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[(set AccRegs:$dst, (add AccRegs:$src1, (load addr:$src2)))]>;
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def ADCabsl : Group1<OpGrp1ADC, AddrModeGrp1AbsLong,
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(outs AccRegs:$dst), (ins AccRegs:$src1, ADDRabsl:$src2),
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"ADC >$src2",
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[(set AccRegs:$dst, (add AccRegs:$src1, (load ADDRabsl:$src2)))]>;
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[(set AccRegs:$dst, (add AccRegs:$src1, (load addr:$src2)))]>;
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def ADCdp : Group1<OpGrp1ADC, AddrModeGrp1DP,
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(outs AccRegs:$dst), (ins AccRegs:$src1, ADDRdp:$src2),
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"ADC <$src2",
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[(set AccRegs:$dst, (add AccRegs:$src1, (load ADDRdp:$src2)))]>;
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[(set AccRegs:$dst, (add AccRegs:$src1, (load addr:$src2)))]>;
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def ADCdpindir : Group1<OpGrp1ADC, AddrModeGrp1DPIndir,
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(outs AccRegs:$dst), (ins AccRegs:$src1, ADDRdp:$src2),
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@ -152,22 +153,22 @@ def ADCsrindir : Group1<OpGrp1ADC, AddrModeGrp1StackRelIndirIdxY,
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def ANDimm : Group1<OpGrp1AND, AddrModeGrp1Imm,
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(outs AccRegs:$dst), (ins AccRegs:$src1, i16imm:$src2),
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"AND #>$src2",
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[(set AccRegs:$dst, (and AccRegs:$src1, i16imm:$src2))]>;
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[(set AccRegs:$dst, (and AccRegs:$src1, i16:$src2))]>;
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def ANDabs : Group1<OpGrp1AND, AddrModeGrp1Abs,
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(outs AccRegs:$dst), (ins AccRegs:$src1, ADDRabs:$src2),
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"AND |$src2",
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[(set AccRegs:$dst, (and AccRegs:$src1, (load ADDRabs:$src2)))]>;
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[(set AccRegs:$dst, (and AccRegs:$src1, (load addr:$src2)))]>;
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def ANDabsl : Group1<OpGrp1AND, AddrModeGrp1AbsLong,
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(outs AccRegs:$dst), (ins AccRegs:$src1, ADDRabsl:$src2),
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"AND >$src2",
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[(set AccRegs:$dst, (and AccRegs:$src1, (load ADDRabsl:$src2)))]>;
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[(set AccRegs:$dst, (and AccRegs:$src1, (load addr:$src2)))]>;
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def ANDdp : Group1<OpGrp1AND, AddrModeGrp1DP,
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(outs AccRegs:$dst), (ins AccRegs:$src1, ADDRdp:$src2),
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"AND <$src2",
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[(set AccRegs:$dst, (and AccRegs:$src1, (load ADDRdp:$src2)))]>;
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[(set AccRegs:$dst, (and AccRegs:$src1, (load addr:$src2)))]>;
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def ANDdpindir : Group1<OpGrp1AND, AddrModeGrp1DPIndir,
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(outs AccRegs:$dst), (ins AccRegs:$src1, ADDRdp:$src2),
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@ -302,22 +303,22 @@ def CMPsrindir : Group1<OpGrp1CMP, AddrModeGrp1StackRelIndirIdxY,
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def EORimm : Group1<OpGrp1EOR, AddrModeGrp1Imm,
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(outs AccRegs:$dst), (ins AccRegs:$src1, i16imm:$src2),
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"EOR #>$src2",
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[(set AccRegs:$dst, (xor AccRegs:$src1, i16imm:$src2))]>;
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[(set AccRegs:$dst, (xor AccRegs:$src1, i16:$src2))]>;
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def EORabs : Group1<OpGrp1EOR, AddrModeGrp1Abs,
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(outs AccRegs:$dst), (ins AccRegs:$src1, ADDRabs:$src2),
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"EOR |$src2",
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[(set AccRegs:$dst, (xor AccRegs:$src1, (load ADDRabs:$src2)))]>;
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[(set AccRegs:$dst, (xor AccRegs:$src1, (load addr:$src2)))]>;
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def EORabsl : Group1<OpGrp1EOR, AddrModeGrp1AbsLong,
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(outs AccRegs:$dst), (ins AccRegs:$src1, ADDRabsl:$src2),
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"EOR >$src2",
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[(set AccRegs:$dst, (xor AccRegs:$src1, (load ADDRabsl:$src2)))]>;
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[(set AccRegs:$dst, (xor AccRegs:$src1, (load addr:$src2)))]>;
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def EORdp : Group1<OpGrp1EOR, AddrModeGrp1DP,
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(outs AccRegs:$dst), (ins AccRegs:$src1, ADDRdp:$src2),
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"EOR <$src2",
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[(set AccRegs:$dst, (xor AccRegs:$src1, (load ADDRdp:$src2)))]>;
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[(set AccRegs:$dst, (xor AccRegs:$src1, (load addr:$src2)))]>;
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def EORdpindir : Group1<OpGrp1EOR, AddrModeGrp1DPIndir,
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(outs AccRegs:$dst), (ins AccRegs:$src1, ADDRdp:$src2),
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@ -375,24 +376,24 @@ def EORsrindir : Group1<OpGrp1EOR, AddrModeGrp1StackRelIndirIdxY,
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[]>;
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def LDAimm : Group1<OpGrp1LDA, AddrModeGrp1Imm,
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(outs AccRegs:$dst), (ins i16imm:$src1),
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"LDA #>$src1",
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[(set AccRegs:$dst, i16imm:$src)]>;
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(outs AccRegs:$dst), (ins i16imm:$src),
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"LDA #>$src",
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[(set AccRegs:$dst, i16:$src)]>;
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def LDAabs : Group1<OpGrp1LDA, AddrModeGrp1Abs,
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(outs AccRegs:$dst), (ins AccRegs:$src1, ADDRabs:$src2),
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"LDA |$src2",
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[(set AccRegs:$dst, (load ADDRabs:$src2))]>;
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(outs AccRegs:$dst), (ins ADDRabs:$src),
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"LDA |$src",
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[(set AccRegs:$dst, (load addr:$src))]>;
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def LDAabsl : Group1<OpGrp1LDA, AddrModeGrp1AbsLong,
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(outs AccRegs:$dst), (ins AccRegs:$src1, ADDRabsl:$src2),
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"LDA >$src2",
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[(set AccRegs:$dst, (load ADDRabsl:$src2))]>;
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(outs AccRegs:$dst), (ins ADDRabsl:$src),
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"LDA >$src",
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[(set AccRegs:$dst, (load addr:$src))]>;
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def LDAdp : Group1<OpGrp1LDA, AddrModeGrp1DP,
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(outs AccRegs:$dst), (ins AccRegs:$src1, ADDRdp:$src2),
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"LDA <$src2",
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[(set AccRegs:$dst, (load ADDRdp:$src2))]>;
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(outs AccRegs:$dst), (ins ADDRdp:$src),
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"LDA <$src",
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[(set AccRegs:$dst, (load addr:$src))]>;
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def LDAdpindir : Group1<OpGrp1LDA, AddrModeGrp1DPIndir,
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(outs AccRegs:$dst), (ins AccRegs:$src1, ADDRdp:$src2),
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@ -452,22 +453,22 @@ def LDAsrindir : Group1<OpGrp1LDA, AddrModeGrp1StackRelIndirIdxY,
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def ORAimm : Group1<OpGrp1ORA, AddrModeGrp1Imm,
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(outs AccRegs:$dst), (ins AccRegs:$src1, i16imm:$src2),
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"ORA #>$src2",
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[(set AccRegs:$dst, (or AccRegs:$src1, i16imm:$src2))]>;
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[(set AccRegs:$dst, (or AccRegs:$src1, i16:$src2))]>;
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def ORAabs : Group1<OpGrp1ORA, AddrModeGrp1Abs,
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(outs AccRegs:$dst), (ins AccRegs:$src1, ADDRabs:$src2),
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"ORA |$src2",
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[(set AccRegs:$dst, (or AccRegs:$src1, (load ADDRabs:$src2)))]>;
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[(set AccRegs:$dst, (or AccRegs:$src1, (load addr:$src2)))]>;
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def ORAabsl : Group1<OpGrp1ORA, AddrModeGrp1AbsLong,
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(outs AccRegs:$dst), (ins AccRegs:$src1, ADDRabsl:$src2),
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"ORA >$src2",
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[(set AccRegs:$dst, (or AccRegs:$src1, (load ADDRabsl:$src2)))]>;
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[(set AccRegs:$dst, (or AccRegs:$src1, (load addr:$src2)))]>;
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def ORAdp : Group1<OpGrp1ORA, AddrModeGrp1DP,
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(outs AccRegs:$dst), (ins AccRegs:$src1, ADDRdp:$src2),
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"ORA <$src2",
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[(set AccRegs:$dst, (or AccRegs:$src1, (load ADDRdp:$src2)))]>;
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[(set AccRegs:$dst, (or AccRegs:$src1, (load addr:$src2)))]>;
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def ORAdpindir : Group1<OpGrp1ORA, AddrModeGrp1DPIndir,
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(outs AccRegs:$dst), (ins AccRegs:$src1, ADDRdp:$src2),
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@ -527,22 +528,22 @@ def ORAsrindir : Group1<OpGrp1ORA, AddrModeGrp1StackRelIndirIdxY,
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def SBCimm : Group1<OpGrp1SBC, AddrModeGrp1Imm,
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(outs AccRegs:$dst), (ins AccRegs:$src1, i16imm:$src2),
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"SBC #>$src2",
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[(set AccRegs:$dst, (sub AccRegs:$src1, i16imm:$src2))]>;
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[(set AccRegs:$dst, (sub AccRegs:$src1, i16:$src2))]>;
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def SBCabs : Group1<OpGrp1SBC, AddrModeGrp1Abs,
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(outs AccRegs:$dst), (ins AccRegs:$src1, ADDRabs:$src2),
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"SBC |$src2",
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[(set AccRegs:$dst, (sub AccRegs:$src1, (load ADDRabs:$src2)))]>;
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[(set AccRegs:$dst, (sub AccRegs:$src1, (load addr:$src2)))]>;
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def SBCabsl : Group1<OpGrp1SBC, AddrModeGrp1AbsLong,
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(outs AccRegs:$dst), (ins AccRegs:$src1, ADDRabsl:$src2),
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"SBC >$src2",
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[(set AccRegs:$dst, (sub AccRegs:$src1, (load ADDRabsl:$src2)))]>;
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[(set AccRegs:$dst, (sub AccRegs:$src1, (load addr:$src2)))]>;
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def SBCdp : Group1<OpGrp1SBC, AddrModeGrp1DP,
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(outs AccRegs:$dst), (ins AccRegs:$src1, ADDRdp:$src2),
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"SBC <$src2",
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[(set AccRegs:$dst, (sub AccRegs:$src1, (load ADDRdp:$src2)))]>;
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[(set AccRegs:$dst, (sub AccRegs:$src1, (load addr:$src2)))]>;
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def SBCdpindir : Group1<OpGrp1SBC, AddrModeGrp1DPIndir,
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(outs AccRegs:$dst), (ins AccRegs:$src1, ADDRdp:$src2),
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@ -602,7 +603,7 @@ def SBCsrindir : Group1<OpGrp1SBC, AddrModeGrp1StackRelIndirIdxY,
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def STAabs : Group1<OpGrp1STA, AddrModeGrp1Abs,
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(outs ADDRabs:$dst), (ins AccRegs:$src),
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"STA |$dst",
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[(store AccRegs:$src, ADDRabs:$dst)]>;
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[(store AccRegs:$src, addr:$dst)]>;
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def STAabsl : Group1<OpGrp1STA, AddrModeGrp1AbsLong,
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(outs ADDRabsl:$dst), (ins AccRegs:$src),
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@ -674,17 +675,19 @@ def STAsrindir : Group1<OpGrp1STA, AddrModeGrp1StackRelIndirIdxY,
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def ASLacc : Group2<OpGrp2ASL, AddrModeGrp2Acc,
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(outs AccRegs:$dst), (ins AccRegs:$src),
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"ASL $src",
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[(set AccRegs:$dst, (shl AccRegs:$src, (i8 1)))]>;
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[(set AccRegs:$dst, (shl AccRegs:$src, (i16 1)))]>;
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def ASLabs : Group2<OpGrp2ASL, AddrModeGrp2Abs,
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(outs ), (ins ADDRabs:$dst),
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"ASL |$dst",
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[(store (shl (load ADDRabs:$dst), (i8 1)), ADDRabs:$dst)]>;
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[]>;
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// JSR TODO - [(store (shl (load addr:$dst), (i16 1)), addr:$dst)]>;
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def ASLdp : Group2<OpGrp2ASL, AddrModeGrp2DP,
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(outs ), (ins ADDRdp:$dst),
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"ASL <$src",
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[(store (shl (load ADDRdp:$dst), (i8 1)), ADDRdp:$dst)]>;
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[]>;
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// JSR TODO - [(store (shl (load addr:$dst), (i8 1)), addr:$dst)]>;
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def ASLabsix : Group2<OpGrp2ASL, AddrModeGrp2AbsIdx,
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(outs ADDRabs:$dst), (ins ADDRabs:$src1, IndexXRegs:$src2),
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@ -704,12 +707,14 @@ def DECacc : Group2<OpGrp2DEC, AddrModeGrp2Acc,
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def DECabs : Group2<OpGrp2DEC, AddrModeGrp2Abs,
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(outs ), (ins ADDRabs:$dst),
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"DEC |$dst",
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[(store (sub (load ADDRabs:$dst), 1), ADDRabs:$dst)]>;
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[]>;
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// JSR TODO - [(store (sub (load addr:$dst), 1), addr:$dst)]>;
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def DECdp : Group2<OpGrp2DEC, AddrModeGrp2DP,
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(outs ), (ins ADDRdp:$dst),
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"DEC <$dst",
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[(store (sub (load ADDRdp:$dst), 1), ADDRdp:$dst)]>;
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[]>;
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// JSR TODO - [(store (sub (load addr:$dst), 1), addr:$dst)]>;
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def DECabsix : Group2<OpGrp2DEC, AddrModeGrp2AbsIdx,
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(outs ADDRabs:$dst), (ins ADDRabs:$src1, IndexXRegs:$src2),
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@ -729,12 +734,14 @@ def INCacc : Group2<OpGrp2INC, AddrModeGrp2Acc,
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def INCabs : Group2<OpGrp2INC, AddrModeGrp2Abs,
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(outs ), (ins ADDRabs:$dst),
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"INC |$dst",
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[(store (add (load ADDRabs:$dst), 1), ADDRabs:$dst)]>;
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[]>;
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// JSR TODO - [(store (add (load addr:$dst), 1), addr:$dst)]>;
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def INCdp : Group2<OpGrp2INC, AddrModeGrp2DP,
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(outs ), (ins ADDRdp:$dst),
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"INC <$dst",
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[(store (add (load ADDRdp:$dst), 1), ADDRdp:$dst)]>;
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[]>;
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// JSR TODO - [(store (add (load addr:$dst), 1), addr:$dst)]>;
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def INCabsix : Group2<OpGrp2INC, AddrModeGrp2AbsIdx,
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(outs ADDRabs:$dst), (ins ADDRabs:$src1, IndexXRegs:$src2),
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@ -749,17 +756,17 @@ def INCdpix : Group2<OpGrp2INC, AddrModeGrp2DPIdx,
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def LDXimm : Group2<OpGrp2LDXY, AddrModeGrp2Imm,
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(outs IndexXRegs:$dst), (ins i16imm:$src),
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"LDX #$src",
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[(set IndexXRegs:$dst, i16imm:$src)]>;
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[(set IndexXRegs:$dst, i16:$src)]>;
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def LDXabs : Group2<OpGrp2LDXY, AddrModeGrp2Abs,
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(outs IndexXRegs:$dst), (ins ADDRabs:$src),
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"LDX |$src",
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[(set IndexXRegs:$dst, (load ADDRabs:$src))]>;
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[(set IndexXRegs:$dst, (load addr:$src))]>;
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def LDXdp : Group2<OpGrp2LDXY, AddrModeGrp2DP,
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(outs IndexXRegs:$dst), (ins ADDRdp:$src),
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"LDX <$src",
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[(set IndexXRegs:$dst, (load ADDRdp:$src))]>;
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[(set IndexXRegs:$dst, (load addr:$src))]>;
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def LDXabsiy : Group2<OpGrp2LDXY, AddrModeGrp2AbsIdx,
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(outs IndexXRegs:$dst), (ins ADDRabs:$src1, IndexYRegs:$src2),
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@ -774,17 +781,17 @@ def LDXdpiy : Group2<OpGrp2LDXY, AddrModeGrp2DPIdx,
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def LDYimm : Group2_Y<OpGrp2LDXY, AddrModeGrp2Imm,
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(outs IndexYRegs:$dst), (ins i16imm:$src),
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"LDY #$src",
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[(set IndexYRegs:$dst, i16imm:$src)]>;
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[(set IndexYRegs:$dst, i16:$src)]>;
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def LDYabs : Group2_Y<OpGrp2LDXY, AddrModeGrp2Abs,
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(outs IndexYRegs:$dst), (ins ADDRabs:$src),
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"LDY |$src",
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[(set IndexYRegs:$dst, (load ADDRabs:$src))]>;
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[(set IndexYRegs:$dst, (load addr:$src))]>;
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def LDYdp : Group2_Y<OpGrp2LDXY, AddrModeGrp2DP,
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(outs IndexYRegs:$dst), (ins ADDRdp:$src),
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"LDY <$src",
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[(set IndexYRegs:$dst, (load ADDRdp:$src))]>;
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[(set IndexYRegs:$dst, (load addr:$src))]>;
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def LDYabsix : Group2_Y<OpGrp2LDXY, AddrModeGrp2AbsIdx,
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(outs IndexYRegs:$dst), (ins ADDRabs:$src1, IndexXRegs:$src2),
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@ -804,12 +811,14 @@ def LSRacc : Group2<OpGrp2LSR, AddrModeGrp2Acc,
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def LSRabs : Group2<OpGrp2LSR, AddrModeGrp2Abs,
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(outs ), (ins ADDRabs:$dst),
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"LSR |$dst",
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[(store (srl (load ADDRabs:$dst), (i8 1)), ADDRabs:$dst)]>;
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[]>;
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// JSR TODO - [(store (srl (load addr:$dst), (i8 1)), addr:$dst)]>;
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def LSRdp : Group2<OpGrp2LSR, AddrModeGrp2DP,
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(outs ), (ins ADDRdp:$dst),
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"LSR <$dst",
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[(store (srl (load ADDRdp:$dst), (i8 1)), ADDRdp:$dst)]>;
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[]>;
|
||||
// JSR TODO - [(store (srl (load addr:$dst), (i8 1)), addr:$dst)]>;
|
||||
|
||||
def LSRabsix : Group2<OpGrp2LSR, AddrModeGrp2AbsIdx,
|
||||
(outs ADDRabs:$dst), (ins ADDRabs:$src1, IndexXRegs:$src2),
|
||||
|
|
@ -829,12 +838,14 @@ def ROLacc : Group2<OpGrp2ROL, AddrModeGrp2Acc,
|
|||
def ROLabs : Group2<OpGrp2ROL, AddrModeGrp2Abs,
|
||||
(outs ), (ins ADDRabs:$dst),
|
||||
"ROL |$dst",
|
||||
[(store (rotl (load ADDRabs:$dst), (i8 1)), ADDRabs:$dst)]>;
|
||||
[]>;
|
||||
// JSR TODO - [(store (rotl (load addr:$dst), (i8 1)), addr:$dst)]>;
|
||||
|
||||
def ROLdp : Group2<OpGrp2ROL, AddrModeGrp2DP,
|
||||
(outs ), (ins ADDRdp:$dst),
|
||||
"ROL <$dst",
|
||||
[(store (rotl (load ADDRdp:$dst), (i8 1)), ADDRdp:$dst)]>;
|
||||
[]>;
|
||||
// JSR TODO - [(store (rotl (load addr:$dst), (i8 1)), addr:$dst)]>;
|
||||
|
||||
def ROLabsix : Group2<OpGrp2ROL, AddrModeGrp2AbsIdx,
|
||||
(outs ADDRabs:$dst), (ins ADDRabs:$src1, IndexXRegs:$src2),
|
||||
|
|
@ -854,12 +865,14 @@ def RORacc : Group2<OpGrp2ROR, AddrModeGrp2Acc,
|
|||
def RORabs : Group2<OpGrp2ROR, AddrModeGrp2Abs,
|
||||
(outs ), (ins ADDRabs:$dst),
|
||||
"ROR |$dst",
|
||||
[(store (rotr (load ADDRabs:$dst), (i8 1)), ADDRabs:$dst)]>;
|
||||
[]>;
|
||||
// JSR TODO - [(store (rotr (load addr:$dst), (i8 1)), addr:$dst)]>;
|
||||
|
||||
def RORdp : Group2<OpGrp2ROR, AddrModeGrp2DP,
|
||||
(outs ), (ins ADDRdp:$dst),
|
||||
"ROR <$dst",
|
||||
[(store (rotr (load ADDRdp:$dst), (i8 1)), ADDRdp:$dst)]>;
|
||||
[]>;
|
||||
// JSR TODO - [(store (rotr (load addr:$dst), (i8 1)), addr:$dst)]>;
|
||||
|
||||
def RORabsix : Group2<OpGrp2ROR, AddrModeGrp2AbsIdx,
|
||||
(outs ADDRabs:$dst), (ins ADDRabs:$src1, IndexXRegs:$src2),
|
||||
|
|
|
|||
Loading…
Reference in New Issue