Some more implementation towards my first successful compile of a simple function.
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2e2ecfb186
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@ -167,9 +167,7 @@ bool SparcDAGToDAGISel::SelectADDRrr(SDValue Addr, SDValue &R1, SDValue &R2) {
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#endif
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SDNode *WDC65816DAGToDAGISel::Select(SDNode *N) {
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WDC_LOG("WDC_TODO - Unimplemented method called");
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return NULL;
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#if 0 // WDC_TODO - we will definitely need something here
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WDC_LOG("WDC_TODO - Unimplemented method called, opcode=%s", N->getOperationName().c_str());
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SDLoc dl(N);
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if (N->isMachineOpcode()) {
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N->setNodeId(-1);
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@ -178,6 +176,8 @@ SDNode *WDC65816DAGToDAGISel::Select(SDNode *N) {
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switch (N->getOpcode()) {
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default: break;
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#if 0 // WDC_TODO - Do I need any of this
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case SPISD::GLOBAL_BASE_REG:
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return getGlobalBaseReg();
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@ -217,10 +217,10 @@ SDNode *WDC65816DAGToDAGISel::Select(SDNode *N) {
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// The high part is in the Y register.
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return CurDAG->SelectNodeTo(N, SP::RDY, MVT::i32, SDValue(Mul, 1));
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}
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#endif
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}
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return SelectCode(N);
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#endif
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}
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@ -46,8 +46,6 @@ SDValue WDC65816TargetLowering::LowerFormalArguments(SDValue Chain,
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SelectionDAG &DAG,
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SmallVectorImpl<SDValue> &InVals) const {
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MachineFunction &MF = DAG.getMachineFunction();
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MachineRegisterInfo &RegInfo = MF.getRegInfo();
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WDC65816MachineFunctionInfo *FuncInfo = MF.getInfo<WDC65816MachineFunctionInfo>();
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// Assign locations to all of the incoming arguments.
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SmallVector<CCValAssign, 16> ArgLocs;
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@ -130,7 +128,6 @@ WDC65816TargetLowering::LowerReturn(SDValue Chain,
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RetOps.push_back(DAG.getRegister(VA.getLocReg(), VA.getLocVT()));
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}
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// If the function returns a struct, copy the SRetReturnReg to I0
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if (MF.getFunction()->hasStructRetAttr()) {
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WDC_LOG("WDC_TODO - Need to implement hasStructRetAttr() case");
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}
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@ -145,19 +142,6 @@ WDC65816TargetLowering::LowerReturn(SDValue Chain,
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&RetOps[0], RetOps.size());
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}
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#if 0 // WDC_TODO - Get rid of this?
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// The calling conventions in WDC65816CallingConv.td are described in terms of the
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// callee's register window. This function translates registers to the
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// corresponding caller window %o register.
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static unsigned toCallerWindow(unsigned Reg) {
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assert(SP::I0 + 7 == SP::I7 && SP::O0 + 7 == SP::O7 && "Unexpected enum");
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if (Reg >= SP::I0 && Reg <= SP::I7)
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return Reg - SP::I0 + SP::O0;
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return Reg;
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}
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#endif
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#if 0 // WDC_TODO - Disable more stuff
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@ -19,11 +19,10 @@
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#include "llvm/Target/TargetLowering.h"
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namespace llvm {
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class WDC65816Subtarget;
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namespace WDCISD {
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enum {
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FIRST_NUMBER = ISD::BUILTIN_OP_END,
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RET_FLAG, // Return with a flag operand.
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RET_FLAG // Return with a flag operand.
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#if 0
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CMPICC, // Compare two GPR operands, set icc+xcc.
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CMPFCC, // Compare two FP operands, set fcc.
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@ -53,7 +52,6 @@ namespace llvm {
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}
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class WDC65816TargetLowering : public TargetLowering {
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const WDC65816Subtarget *Subtarget;
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public:
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WDC65816TargetLowering(TargetMachine &TM);
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