59 lines
2.1 KiB
TableGen
59 lines
2.1 KiB
TableGen
//===- WDC65816RegisterInfo.td - WDC65816 Register defs ----*- tablegen -*-===//
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//
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// The LLVM Compiler Infrastructure
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//
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// This file is distributed under the University of Illinois Open Source
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// License. See LICENSE.TXT for details.
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//
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//===----------------------------------------------------------------------===//
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//===----------------------------------------------------------------------===//
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// Declarations that describe the WDC65816 register file
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//===----------------------------------------------------------------------===//
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let Namespace = "WDC" in {
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def A : Register<"A">;
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def X : Register<"X">;
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def Y : Register<"Y">;
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def P : Register<"P">;
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def S : Register<"S">;
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def D : Register<"D">;
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def K : Register<"K">;
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def B : Register<"B">;
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def PC : Register<"PC">;
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def FP : Register<"FP">; // WDC_TODO - this will end up being a 32-bit zero page value
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}
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// WDC_TODO - model all zero page values as a series of 16-bit, 32-bit, 64-bit registers
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// Also model them as floating point registers.
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def IntRegs : RegisterClass<"WDC", [i16], 8,
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(add A, X, Y)>;
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def AccRegs : RegisterClass<"WDC", [i16], 8,
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(add A)>;
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def IndexRegs : RegisterClass<"WDC", [i16], 8,
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(add X, Y)>;
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def IndexXRegs : RegisterClass<"WDC", [i16], 8,
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(add X)>;
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def IndexYRegs : RegisterClass<"WDC", [i16], 8,
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(add Y)>;
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def DataBankRegs : RegisterClass<"WDC", [i8], 8,
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(add B)>;
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def DirectPageRegs : RegisterClass<"WDC", [i16], 8,
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(add D)>;
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def StackPointerRegs : RegisterClass<"WDC", [i16], 8,
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(add S)>;
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def ProcessorStatusRegs : RegisterClass<"WDC", [i8], 8,
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(add P)>;
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def ProgramBankRegs : RegisterClass<"WDC", [i8], 8,
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(add K)>;
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