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464 lines
10 KiB
Plaintext
464 lines
10 KiB
Plaintext
.TL
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\s+9genmacros.m\s-9
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.AU
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a macro library for use with the 6502 version of Macross
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.AI
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Lucasfilm Ltd. Games Division
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\\*(DY
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.ds LH genmacros.m
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.ds CH \\*(DY
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.ds RH Reference Manual
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.ds LF Lucasfilm Ltd. Proprietary Information
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.ds CF - % -
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.ds RF CONFIDENTIAL
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.PP
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These macros have been concocted by various people for the convenience and
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amusement of those programming the 6502 using \fIMacross\fR. The will be
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found in the file \fB/u1/gg/lib/6502/genmacros.m\fR. To use them, insert the
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following statement somewhere near the beginning of your \fIMacross\fR
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program:
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.nf
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\fBinclude "/u1/gg/lib/6502/genmacros.m"\fR
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.fi
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Easy, no? What follows is a summary of the macros, grouped roughly by
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category.
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.sp 1
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.SH
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\s+2Macros to save and restore registers\s-2
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.nf
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\fBphr\fR
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.fi
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.IP
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Push all registers (i.e., the accumulator and the X and Y index registers)
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onto the stack.
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.LP
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.nf
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\fBplr\fR
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.fi
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.IP
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Pull the registers (the accumulator and the X and Y index registers) off the
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stack.
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.LP
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.nf
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\fBphx\fR
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.fi
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.IP
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Push the X register onto the stack.
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.LP
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.nf
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\fBplx\fR
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.fi
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.IP
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Pull the X register off of the stack.
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.LP
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.nf
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\fBphy\fR
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.fi
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.IP
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Push the Y register onto the stack.
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.LP
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.nf
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\fBply\fR
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.fi
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.IP
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Pull the Y register off of the stack.
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.LP
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.nf
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\fBpushaddr \fIaddress\fR
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.fi
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.IP
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Push \fIaddress\fR onto the stack to \fBrts\fR to.
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.sp 1
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.SH
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\s+2Macros to move data around with\s-2
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.PP
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These macros provide an address mode independent method of moving bytes from
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one place to another. The source and destination arguments of these macros
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may, generally speaking, be in any address mode you desire (except, of course,
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that the destination can't be immediate mode!).
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.nf
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\fBmovm \fIn\fB, \fIdest\fB, \fIsrc\fR
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.fi
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.IP
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Move multiple \(em move \fIn\fR bytes from \fIsrc\fR to \fIdest\fR. The bytes
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are moved using the accumulator as an intermediary.
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.LP
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.nf
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\fBmovmx \fIn\fB, \fIdest\fB, \fIsrc\fR
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.fi
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.IP
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Move multiple \(em move \fIn\fR bytes from \fIsrc\fR to \fIdest\fR. The bytes
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are moved using the X register as an intermediary.
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.LP
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.nf
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\fBmovmy \fIn\fB, \fIdest\fB, \fIsrc\fR
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.fi
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.IP
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Move multiple \(em move \fIn\fR bytes from \fIsrc\fR to \fIdest\fR. The bytes
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are moved using the Y register as an intermediary.
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.LP
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.nf
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\fBmv2m \fIn\fB, \fIdest1\fB, \fIdest2\fB, \fIsrc\fR
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.fi
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.IP
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Move multiple to two destinations \(em move \fIn\fR bytes from \fIsrc\fR to
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both \fIdest1\fR and \fIdest2\fR. The bytes are moved using the acuumulator
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as an intermediary.
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.LP
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.nf
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\fBmoveb \fIsrc\fB, \fIdest\fR
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.fi
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.IP
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Move byte \(em move one byte from \fIsrc\fR to \fIdest\fR via the accumulator.
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.LP
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.nf
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\fBmovew \fIsrc\fB, \fIdest\fR
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.fi
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.IP
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Move word \(em move one word from \fIsrc\fR to \fIdest\fR via the accumulator.
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.LP
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.nf
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\fBmovexb \fIsrc\fB, \fIdest\fR
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.fi
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.IP
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Move byte \(em move one byte from \fIsrc\fR to \fIdest\fR via the X register.
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.LP
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.nf
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\fBmovexw \fIsrc\fB, \fIdest\fR
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.fi
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.IP
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Move word \(em move one word from \fIsrc\fR to \fIdest\fR via the X register.
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.LP
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.nf
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\fBmoveyb \fIsrc\fB, \fIdest\fR
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.fi
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.IP
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Move byte \(em move one byte from \fIsrc\fR to \fIdest\fR via the Y register.
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.LP
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.nf
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\fBmoveyw \fIsrc\fB, \fIdest\fR
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.fi
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.IP
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Move word \(em move one word from \fIsrc\fR to \fIdest\fR via the Y register.
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.LP
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.nf
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\fBmovb \fIdest\fB, \fIsrc\fR
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.fi
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.IP
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Move byte \(em move one byte from \fIsrc\fR to \fIdest\fR via the accumulator.
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This is distinguished from \fBmoveb\fR in that it has the order of the
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operands reversed. This confusing feature is provided for compatibility with
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\fBa65\fR.
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.LP
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.nf
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\fBmovw \fIdest\fB, \fIsrc\fR
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.fi
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.IP
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Move word \(em move one word from \fIsrc\fR to \fIdest\fR via the accumulator.
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This is distinguished from \fBmovew\fR in that it has the order of the
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operands reversed. This confusing feature is provided for compatibility with
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\fBa65\fR.
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.LP
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.nf
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\fBclrm \fIn\fB, \fIdest\fR
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.fi
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.IP
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Clear multiple \(em clears (zeros) \fIn\fR bytes starting at \fIdest\fR.
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Leaves a zero in the accumulator.
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.LP
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.nf
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\fBclrb \fIdest\fR
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\fBclearb \fIdest\fR
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.fi
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.IP
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Clear byte \(em clears (zeros) one byte at \fIdest\fR. Leaves a zero in the
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accumulator.
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.LP
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.nf
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\fBclrw \fIdest\fR
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\fBclearw \fIdest\fR
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.fi
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.IP
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Clear word \(em clears (zeros) one word at \fIdest\fR. Leaves a zero in the
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accumulator.
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.sp 1
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.SH
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\s+2Arithmetic macros\s-2
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.nf
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\fBaddm \fIn\fB, \fIdest\fB, \fIsrc1\fB, \fIsrc2\fR
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.fi
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.IP
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Add multiple \(em adds the \fIn\fR byte numbers found at \fIsrc1\fR and
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\fIsrc2\fR and puts the result at \fIdest\fR. Clobbers the accumulator.
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.LP
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.nf
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\fBaddb \fIdest\fB, \fIsrc1\fB, \fIsrc2\fR
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.fi
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.IP
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Add byte \(em adds the one byte numbers \fIsrc1\fR and \fIsrc2\fR and puts the
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one byte result in \fIdest\fR. Clobbers the accumulator.
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.LP
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.nf
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\fBaddw \fIdest\fB, \fIsrc1\fB, \fIsrc2\fR
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.fi
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.IP
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Add word \(em adds the two byte numbers \fIsrc1\fR and \fIsrc2\fR and puts the
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two byte result in \fIdest\fR. Clobbers the accumulator.
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.LP
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.nf
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\fBsubm \fIn\fB, \fIdest\fB, \fIsrc1\fB, \fIsrc2\fR
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.fi
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.IP
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Subtract multiple \(em subtracts the \fIn\fR byte number found at \fIsrc2\fR
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from the same sized number found at \fIsrc1\fR and puts the \fIn\fR byte
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result in \fIdest\fR. Clobbers the accumulator.
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.LP
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.nf
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\fBsubb \fIdest\fB, \fIsrc1\fB, \fIsrc2\fR
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.fi
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.IP
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Subtract byte \(em subtracts the one byte number \fIsrc2\fR from \fIsrc1\fR
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and puts the one byte result in \fIdest\fR. Clobbers the accumulator.
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.LP
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.nf
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\fBsubw \fIdest\fB, \fIsrc1\fB, \fIsrc2\fR
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.fi
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.IP
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Subtract word \(em subtracts the two byte numbers \fIsrc2\fR from \fIsrc1\fR
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and puts the two byte result in \fIdest\fR. Clobbers the accumulator.
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.LP
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.nf
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\fBcmpm \fIn\fB, \fIsrc1\fB, \fIsrc2\fR
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.fi
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.IP
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Compare multiple \(em compares the two \fIn\fR byte numbers found at
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\fIsrc1\fR and \fIsrc2\fR. Clobbers the accumulator.
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.LP
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.nf
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\fBcmpb \fIsrc1\fB, \fIsrc2\fR
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.fi
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.IP
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Compare byte \(em compares the one byte numbers \fIsrc1\fR and \fIsrc2\fR.
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Clobbers the accumulator.
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.LP
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.nf
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\fBcmpw \fIsrc1\fB, \fIsrc2\fR
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.fi
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.IP
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Compare word \(em compares the two byte numbers \fIsrc1\fR and \fIsrc2\fR.
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Clobbers the accumulator.
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.LP
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.nf
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\fBnegm \fIn\fB, \fIdest\fR
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.fi
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.IP
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Negate multiple \(em negates the \fIn\fR byte number at \fIdest\fR. Clobbers
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the accumulator.
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.LP
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.nf
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\fBnegb \fIdest\fR
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.fi
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.IP
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Negate byte \(em negates the one byte number at \fIdest\fR. Clobbers the
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accumulator.
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.LP
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.nf
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\fBnegw \fIdest\fR
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.fi
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.IP
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Negate word \(em negates the two byte number at \fIdest\fR. Clobbers the
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accumulator.
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.LP
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.nf
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\fBasrm \fIn\fB, \fIdest\fR
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.fi
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.IP
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Arithmetic shift right multiple \(em performs a rightward one-bit arithmetic
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shift of the \fIn\fR byte number at \fIdest\fR. Clobbers the accumulator.
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.LP
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.nf
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\fBasrb \fIdest\fR
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.fi
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.IP
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Arithmetic shift right byte \(em performs a rightward one-bit arithmetic
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shift of the byte at \fIdest\fR. Clobbers the accumulator.
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.LP
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.nf
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\fBasrw \fIdest\fR
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.fi
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.IP
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Arithmetic shift right word \(em performs a rightward one-bit arithmetic
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shift of the word at \fIdest\fR. Clobbers the accumulator.
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.LP
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.nf
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\fBaslm \fIn\fB, \fIdest\fR
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.fi
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.IP
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Arithmetic shift left multiple \(em performs a leftward one-bit arithmetic
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shift of the \fIn\fR byte number at \fIdest\fR. Clobbers the accumulator.
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.LP
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.nf
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\fBaslb \fIdest\fR
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.fi
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.IP
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Arithmetic shift left byte \(em performs a leftward one-bit arithmetic
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shift of the byte at \fIdest\fR. Clobbers the accumulator.
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.LP
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.nf
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\fBaslw \fIdest\fR
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.fi
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.IP
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Arithmetic shift left word \(em performs a leftward one-bit arithmetic
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shift of the word at \fIdest\fR. Clobbers the accumulator.
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.LP
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.nf
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\fBlsrm \fIn\fB, \fIdest\fR
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.fi
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.IP
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Logical shift right multiple \(em performs a rightward one-bit logical shift
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of the \fIn\fR byte number at \fIdest\fR. Clobbers the accumulator.
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.LP
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.nf
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\fBlsrb \fIdest\fR
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.fi
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.IP
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Logical shift right byte \(em performs a rightward one-bit logical shift of
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the byte at \fIdest\fR. Clobbers the accumulator.
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.LP
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.nf
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\fBlsrw \fIdest\fR
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.fi
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.IP
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Logical shift right word \(em performs a rightward one-bit logical shift of
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the word at \fIdest\fR. Clobbers the accumulator.
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.SH
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.sp 1
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\s+2Flow-of-control macros\s-2
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.nf
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\fBrepeat \fIn\fB { \fIcode\fB }\fR
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.fi
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.IP
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Replicates the block of \fIMacross\fR statements \fIcode\fR \fIn\fR times.
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.LP
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.nf
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\fBloop \fIcounter\fB, \fIstart\fB, \fIend\fB { \fIcode\fB }\fR
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.fi
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.IP
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Generic ``do-loop'' \(em generates 6502 code for a loop that initializes
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\fIcounter\fR to \fIstart\fR, and then repeatedly executes \fIcode\fR,
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incrementing \fIcounter\fR until it reaches the value \fIend\fR.
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\fICounter\fR may be ``\fBx\fR'' to denote the X index register, ``\fBy\fR''
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to denote the Y index register, or a memory location. \fIStart\fR and
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\fIend\fR may be referenced in any 6502 address mode.
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.SH
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.sp 1
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\s+2Miscellaneous macros\s-2
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.nf
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\fBmbyte \fIn\fR
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.fi
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.IP
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Generates \fIn\fR zero data bytes.
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.bp
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.CD
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\s+5\fBAppendix \*- Summary of the macros\fR\s-5
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.DE
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.LP
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.nf
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\fBaddb \fIdest\fB, \fIsrc1\fB, \fIsrc2\fR
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\fBaddm \fIn\fB, \fIdest\fB, \fIsrc1\fB, \fIsrc2\fR
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\fBaddw \fIdest\fB, \fIsrc1\fB, \fIsrc2\fR
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\fBaslb \fIdest\fR
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\fBaslm \fIn\fB, \fIdest\fR
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\fBaslw \fIdest\fR
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\fBasrb \fIdest\fR
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\fBasrm \fIn\fB, \fIdest\fR
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\fBasrw \fIdest\fR
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\fBclearb \fIdest\fR
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\fBclearw \fIdest\fR
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\fBclrb \fIdest\fR
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\fBclrm \fIn\fB, \fIdest\fR
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\fBclrw \fIdest\fR
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\fBcmpb \fIsrc1\fB, \fIsrc2\fR
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\fBcmpm \fIn\fB, \fIsrc1\fB, \fIsrc2\fR
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\fBcmpw \fIsrc1\fB, \fIsrc2\fR
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\fBloop \fIcounter\fB, \fIstart\fB, \fIend\fB, \fIcode\fR
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\fBlsrb \fIdest\fR
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\fBlsrm \fIn\fB, \fIdest\fR
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\fBlsrw \fIdest\fR
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\fBmbyte \fIn\fR
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\fBmovb \fIdest\fB, \fIsrc\fR
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\fBmoveb \fIsrc\fB, \fIdest\fR
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\fBmovew \fIdest\fB, \fIsrc\fR
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\fBmovexb \fIsrc\fB, \fIdest\fR
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\fBmovexw \fIsrc\fB, \fIdest\fR
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\fBmoveyb \fIsrc\fB, \fIdest\fR
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\fBmoveyw \fIsrc\fB, \fIdest\fR
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\fBmovm \fIn\fB, \fIdest\fB, \fIsrc\fR
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\fBmovmx \fIn\fB, \fIdest\fB, \fIsrc\fR
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\fBmovmy \fIn\fB, \fIdest\fB, \fIsrc\fR
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\fBmovw \fIsrc\fB, \fIdest\fR
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\fBmv2m \fIn\fB, \fIdest1\fB, \fIdest2\fB, \fIsrc\fR
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\fBnegb \fIdest\fR
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\fBnegm \fIn\fB, \fIdest\fR
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\fBnegw \fIdest\fR
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\fBphr\fR
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\fBphx\fR
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\fBphy\fR
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\fBplr\fR
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\fBplx\fR
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\fBply\fR
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\fBpushaddr \fIaddress\fR
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\fBrepeat \fIn\fB, \fIcode\fR
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\fBsubb \fIdest\fB, \fIsrc1\fB, \fIsrc2\fR
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\fBsubm \fIn\fB, \fIdest\fB, \fIsrc1\fB, \fIsrc2\fR
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\fBsubw \fIdest\fB, \fIsrc1\fB, \fIsrc2\fR
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.fi
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