2018-03-05 11:05:37 +00:00
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2018-07-12 16:30:35 +00:00
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#if not(ARCH_6502)
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#warn zp_reg module should be used only on 6502-compatible targets
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#endif
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2018-12-19 00:09:27 +00:00
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noinline asm byte __mul_u8u8u8() {
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2018-03-05 11:05:37 +00:00
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? LDA #0
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2018-06-18 20:40:32 +00:00
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? JMP __mul_u8u8u8_start
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__mul_u8u8u8_add:
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2018-07-01 17:07:47 +00:00
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? CLC
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? ADC __reg.lo
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2018-06-18 20:40:32 +00:00
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__mul_u8u8u8_loop:
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2018-07-01 17:07:47 +00:00
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? ASL __reg.lo
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2018-06-18 20:40:32 +00:00
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__mul_u8u8u8_start:
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2018-07-01 17:07:47 +00:00
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? LSR __reg.hi
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? BCS __mul_u8u8u8_add
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? BNE __mul_u8u8u8_loop
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2018-03-05 11:05:37 +00:00
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? RTS
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}
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2018-12-14 21:50:20 +00:00
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#if ZPREG_SIZE >= 3
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2018-12-19 00:09:27 +00:00
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noinline asm word __mul_u16u8u16() {
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2018-12-14 21:50:20 +00:00
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? LDA #0
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? TAX
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? JMP __mul_u16u8u16_start
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__mul_u16u8u16_add:
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? CLC
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? ADC __reg
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? TAY
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? TXA
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? ADC __reg + 1
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? TAX
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? TYA
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__mul_u16u8u16_loop:
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? ASL __reg
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? ROL __reg + 1
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__mul_u16u8u16_start:
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? LSR __reg + 2
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? BCS __mul_u16u8u16_add
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? BNE __mul_u16u8u16_loop
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? RTS
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}
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#endif
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