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Optimizations for bit packing and common subexpressions
This commit is contained in:
Karol Stasiak
parent
9ea3823bfd
commit
0c66dac3ae
@ -113,10 +113,12 @@ object OptimizationPresets {
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val Good: List[AssemblyOptimization] = List[AssemblyOptimization](
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AlwaysGoodOptimizations.Adc0Optimization,
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AlwaysGoodOptimizations.BitPackingUnpacking,
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AlwaysGoodOptimizations.BranchInPlaceRemoval,
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AlwaysGoodOptimizations.CarryFlagConversion,
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DangerousOptimizations.ConstantIndexOffsetPropagation,
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AlwaysGoodOptimizations.BranchInPlaceRemoval,
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AlwaysGoodOptimizations.CommonBranchBodyOptimization,
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AlwaysGoodOptimizations.CommonExpressionInConditional,
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AlwaysGoodOptimizations.ConstantFlowAnalysis,
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AlwaysGoodOptimizations.ConstantIndexPropagation,
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EmptyMemoryStoreRemoval,
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@ -1,12 +1,11 @@
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package millfork.assembly.opt
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import java.util.UUID
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import java.util.concurrent.atomic.AtomicInteger
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import millfork.assembly.{opt, _}
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import millfork.assembly.Opcode._
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import millfork.assembly.AddrMode._
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import millfork.assembly.Opcode._
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import millfork.assembly.OpcodeClasses._
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import millfork.assembly._
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import millfork.env._
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/**
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@ -823,15 +822,15 @@ object AlwaysGoodOptimizations {
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(Elidable & HasOpcode(LDY) & MatchImmediate(1) & MatchY(0)) ~
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Where(ctx => ctx.get[Constant](1).quickSimplify.isLowestByteAlwaysEqual(ctx.get[Int](0))) ~~> (_ => Nil),
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(Elidable & HasOpcode(LDY) & MatchImmediate(1) & MatchY(0)) ~
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Where(ctx => ctx.get[Constant](1).quickSimplify.isLowestByteAlwaysEqual(ctx.get[Int](0)+1)) ~~> (_ => List(AssemblyLine.implied(INY))),
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Where(ctx => ctx.get[Constant](1).quickSimplify.isLowestByteAlwaysEqual(ctx.get[Int](0) + 1)) ~~> (_ => List(AssemblyLine.implied(INY))),
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(Elidable & HasOpcode(LDY) & MatchImmediate(1) & MatchY(0)) ~
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Where(ctx => ctx.get[Constant](1).quickSimplify.isLowestByteAlwaysEqual(ctx.get[Int](0)-1)) ~~> (_ => List(AssemblyLine.implied(DEY))),
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Where(ctx => ctx.get[Constant](1).quickSimplify.isLowestByteAlwaysEqual(ctx.get[Int](0) - 1)) ~~> (_ => List(AssemblyLine.implied(DEY))),
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(Elidable & HasOpcode(LDX) & MatchImmediate(1) & MatchX(0)) ~
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Where(ctx => ctx.get[Constant](1).quickSimplify.isLowestByteAlwaysEqual(ctx.get[Int](0))) ~~> (_ => Nil),
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(Elidable & HasOpcode(LDX) & MatchImmediate(1) & MatchX(0)) ~
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Where(ctx => ctx.get[Constant](1).quickSimplify.isLowestByteAlwaysEqual(ctx.get[Int](0)+1)) ~~> (_ => List(AssemblyLine.implied(INX))),
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Where(ctx => ctx.get[Constant](1).quickSimplify.isLowestByteAlwaysEqual(ctx.get[Int](0) + 1)) ~~> (_ => List(AssemblyLine.implied(INX))),
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(Elidable & HasOpcode(LDX) & MatchImmediate(1) & MatchX(0)) ~
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Where(ctx => ctx.get[Constant](1).quickSimplify.isLowestByteAlwaysEqual(ctx.get[Int](0)-1)) ~~> (_ => List(AssemblyLine.implied(DEX))),
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Where(ctx => ctx.get[Constant](1).quickSimplify.isLowestByteAlwaysEqual(ctx.get[Int](0) - 1)) ~~> (_ => List(AssemblyLine.implied(DEX))),
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)
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val CommonBranchBodyOptimization = new RuleBasedAssemblyOptimization("Common branch body optimization",
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@ -858,31 +857,120 @@ object AlwaysGoodOptimizations {
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(Elidable & HasOpcode(ADC) & HasClear(State.C) & HasClear(State.D) & MatchImmediate(1)) ~
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HasOpcode(ASL).+.capture(2) ~
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(Elidable & HasOpcode(CLC)) ~
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(Elidable & HasOpcode(ADC) & HasClear(State.D) & MatchImmediate(3) & DoesntMatterWhatItDoesWith(State.C, State.Z, State.N)) ~~> {(code, ctx) =>
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(Elidable & HasOpcode(ADC) & HasClear(State.D) & MatchImmediate(3) & DoesntMatterWhatItDoesWith(State.C, State.Z, State.N)) ~~> { (code, ctx) =>
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val shifts = ctx.get[List[AssemblyLine]](2)
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val const = ctx.get[Constant](1).asl(shifts.length) + ctx.get[Constant](3)
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shifts ++ List(AssemblyLine.implied(CLC), AssemblyLine.immediate(ADC, const))
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},
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(Elidable & HasOpcode(AND) & MatchImmediate(1)) ~
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(Elidable & HasOpcode(AND) & MatchImmediate(1)) ~
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HasOpcode(ASL).+.capture(2) ~
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(Elidable & HasOpcode(AND) & MatchImmediate(3) & DoesntMatterWhatItDoesWith(State.C, State.Z, State.N)) ~~> {(code, ctx) =>
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(Elidable & HasOpcode(AND) & MatchImmediate(3) & DoesntMatterWhatItDoesWith(State.C, State.Z, State.N)) ~~> { (code, ctx) =>
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val shifts = ctx.get[List[AssemblyLine]](2)
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val const = CompoundConstant(MathOperator.And, ctx.get[Constant](1).asl(shifts.length), ctx.get[Constant](3)).quickSimplify
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shifts :+ AssemblyLine.immediate(AND, const)
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},
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(Elidable & HasOpcode(EOR) & MatchImmediate(1)) ~
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(Elidable & HasOpcode(EOR) & MatchImmediate(1)) ~
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HasOpcode(ASL).+.capture(2) ~
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(Elidable & HasOpcode(EOR) & MatchImmediate(3) & DoesntMatterWhatItDoesWith(State.C, State.Z, State.N)) ~~> {(code, ctx) =>
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(Elidable & HasOpcode(EOR) & MatchImmediate(3) & DoesntMatterWhatItDoesWith(State.C, State.Z, State.N)) ~~> { (code, ctx) =>
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val shifts = ctx.get[List[AssemblyLine]](2)
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val const = CompoundConstant(MathOperator.Exor, ctx.get[Constant](1).asl(shifts.length), ctx.get[Constant](3)).quickSimplify
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shifts :+ AssemblyLine.immediate(EOR, const)
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},
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(Elidable & HasOpcode(ORA) & MatchImmediate(1)) ~
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(Elidable & HasOpcode(ORA) & MatchImmediate(1)) ~
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HasOpcode(ASL).+.capture(2) ~
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(Elidable & HasOpcode(ORA) & MatchImmediate(3) & DoesntMatterWhatItDoesWith(State.C, State.Z, State.N)) ~~> {(code, ctx) =>
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(Elidable & HasOpcode(ORA) & MatchImmediate(3) & DoesntMatterWhatItDoesWith(State.C, State.Z, State.N)) ~~> { (code, ctx) =>
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val shifts = ctx.get[List[AssemblyLine]](2)
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val const = CompoundConstant(MathOperator.Or, ctx.get[Constant](1).asl(shifts.length), ctx.get[Constant](3)).quickSimplify
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shifts :+ AssemblyLine.immediate(ORA, const)
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},
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)
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val BitPackingUnpacking = new RuleBasedAssemblyOptimization("Bit packing/unpacking",
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needsFlowInfo = FlowInfoRequirement.BothFlows,
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(Elidable & HasOpcode(LDA) & MatchAddrMode(0) & MatchParameter(1)) ~
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(Elidable & HasOpcode(AND) & HasImmediate(1)) ~
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((Elidable & Linear & Not(ChangesMemory) & DoesNotConcernMemoryAt(0, 1) & Not(ChangesA)).* ~
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(Elidable & HasOpcode(STA) & DoesNotConcernMemoryAt(0, 1))).capture(3) ~
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((Elidable & HasOpcodeIn(Set(LSR, ROR)) & Not(ChangesA) & MatchAddrMode(0) & Not(MatchParameter(1))).* ~
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(Elidable & HasOpcodeIn(Set(LSR, ROR)) & MatchAddrMode(0) & MatchParameter(1) & DoesntMatterWhatItDoesWith(State.Z, State.C, State.N))).capture(2) ~~> { (code, ctx) =>
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ctx.get[List[AssemblyLine]](2) ++
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List(AssemblyLine.immediate(LDA, 0), AssemblyLine.implied(ROL)) ++
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ctx.get[List[AssemblyLine]](3)
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},
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(Elidable & HasOpcode(LDA) & HasImmediate(1)) ~
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(Elidable & HasOpcode(AND) & MatchAddrMode(0) & MatchParameter(1)) ~
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((Elidable & Linear & Not(ChangesMemory) & DoesNotConcernMemoryAt(0, 1) & Not(ChangesA)).* ~
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(Elidable & HasOpcode(STA) & DoesNotConcernMemoryAt(0, 1))).capture(3) ~
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((Elidable & HasOpcodeIn(Set(LSR, ROR)) & Not(ChangesA) & MatchAddrMode(0) & Not(MatchParameter(1))).* ~
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(Elidable & HasOpcodeIn(Set(LSR, ROR)) & MatchAddrMode(0) & MatchParameter(1) & DoesntMatterWhatItDoesWith(State.Z, State.C, State.N))).capture(2) ~~> { (code, ctx) =>
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ctx.get[List[AssemblyLine]](2) ++
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List(AssemblyLine.immediate(LDA, 0), AssemblyLine.implied(ROL)) ++
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ctx.get[List[AssemblyLine]](3)
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},
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(Elidable & (HasOpcode(ASL) | HasOpcode(ROL) & HasClear(State.C)) & MatchAddrMode(0) & MatchParameter(1)) ~
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(Elidable & HasOpcode(ROL) & Not(ChangesA) & MatchAddrMode(0) & Not(MatchParameter(1))).*.capture(2) ~
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(Elidable & HasOpcode(CLC)).? ~
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(Elidable & HasOpcodeIn(Set(LDA, TYA, TXA, PLA))).capture(3) ~
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(Elidable & HasOpcode(AND) & HasImmediate(1)) ~
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(Elidable & HasOpcode(CLC)).? ~
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(Elidable & (HasOpcode(ORA) | HasOpcode(ADC) & HasClear(State.C) & HasClear(State.D)) & MatchAddrMode(0) & MatchParameter(1)) ~
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(Elidable & HasOpcode(STA) & MatchAddrMode(0) & MatchParameter(1) & DoesntMatterWhatItDoesWith(State.C, State.N, State.Z, State.V, State.A)) ~~> { (code, ctx) =>
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ctx.get[List[AssemblyLine]](3) ++
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List(AssemblyLine.implied(ROR), code.head.copy(opcode = ROL)) ++
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ctx.get[List[AssemblyLine]](2)
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},
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)
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private def blockIsIdempotentWhenItComesToIndexRegisters(i: Int) = Where(ctx => {
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val code = ctx.get[List[AssemblyLine]](i)
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val rx = code.indexWhere(ReadsX)
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val wx = code.indexWhere(l => ChangesX(l.opcode))
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val ry = code.indexWhere(ReadsY)
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val wy = code.indexWhere(l => ChangesY(l.opcode))
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val xOk = rx < 0 || wx < 0 || rx >= wx
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val yOk = ry < 0 || wy < 0 || ry >= wy
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xOk && yOk
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})
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val CommonExpressionInConditional = new RuleBasedAssemblyOptimization("Common expression in conditional",
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needsFlowInfo = FlowInfoRequirement.BackwardFlow,
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(
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(HasOpcodeIn(Set(LDA, LAX)) & MatchAddrMode(0) & MatchParameter(1)) ~
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HasOpcodeIn(Set(LDY, LDX, AND, ORA, EOR, ADC, SBC, CLC, SEC, CPY, CPX, CMP)).*
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).capture(7) ~
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blockIsIdempotentWhenItComesToIndexRegisters(7) ~
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HasOpcodeIn(ShortConditionalBranching) ~
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MatchElidableCopyOf(7, Anything, DoesntMatterWhatItDoesWith(State.C, State.Z, State.N, State.V)) ~~> { code =>
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code.take(code.length / 2 + 1)
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},
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(
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(
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(HasOpcodeIn(Set(LDA, LAX)) & MatchAddrMode(0) & MatchParameter(1)) ~
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HasOpcodeIn(Set(LDY, LDX, AND, ORA, EOR, ADC, SBC, CLC, SEC, CPY, CPX, CMP)).*
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).capture(7) ~
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blockIsIdempotentWhenItComesToIndexRegisters(7) ~
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(HasOpcodeIn(ShortConditionalBranching) & MatchParameter(2)) ~
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Not(HasOpcode(LABEL) & MatchParameter(2)).* ~
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(HasOpcode(LABEL) & MatchParameter(2))
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).capture(3) ~
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MatchElidableCopyOf(7, Anything, DoesntMatterWhatItDoesWith(State.C, State.Z, State.N, State.V)) ~~> { (_, ctx) =>
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ctx.get[List[AssemblyLine]](3)
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},
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(Elidable & HasOpcodeIn(Set(LDA, LAX)) & MatchAddrMode(0) & MatchParameter(1)) ~
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(Elidable & HasOpcode(AND) & HasAddrModeIn(Set(Absolute, ZeroPage)) & DoesntMatterWhatItDoesWith(State.C, State.V, State.A)) ~
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HasOpcodeIn(Set(BEQ, BNE)) ~
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(HasOpcodeIn(Set(LDA, LAX)) & MatchAddrMode(0) & MatchParameter(1)) ~~> { code =>
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List(code(0), code(1).copy(opcode = BIT), code(2))
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},
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(Elidable & HasOpcode(LDA) & HasAddrModeIn(Set(Absolute, ZeroPage))) ~
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(Elidable & HasOpcode(AND) & MatchAddrMode(0) & MatchParameter(1)) ~
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HasOpcodeIn(Set(BEQ, BNE)) ~
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(HasOpcode(LDA) & MatchAddrMode(0) & MatchParameter(1)) ~~> { code =>
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List(code(1).copy(opcode = LDA), code(0).copy(opcode = BIT), code(2))
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},
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)
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}
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@ -383,16 +383,16 @@ trait AssemblyLinePattern extends AssemblyPattern {
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handleKnownDistance((-distance).toShort)
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case (CompoundConstant(MathOperator.Minus, a, NumericConstant(distance, _)), b) if a.quickSimplify == b.quickSimplify =>
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handleKnownDistance(distance.toShort)
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case (MemoryAddressConstant(a: ThingInMemory), MemoryAddressConstant(b:ThingInMemory)) =>
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case (MemoryAddressConstant(a: ThingInMemory), MemoryAddressConstant(b: ThingInMemory)) =>
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a.name.takeWhile(_ != '.') != b.name.takeWhile(_ != '.') // TODO: ???
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case (CompoundConstant(MathOperator.Plus | MathOperator.Minus, MemoryAddressConstant(a: ThingInMemory), NumericConstant(_, _)),
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MemoryAddressConstant(b: ThingInMemory)) =>
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MemoryAddressConstant(b: ThingInMemory)) =>
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a.name.takeWhile(_ != '.') != b.name.takeWhile(_ != '.') // TODO: ???
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case (MemoryAddressConstant(a: ThingInMemory),
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CompoundConstant(MathOperator.Plus | MathOperator.Minus, MemoryAddressConstant(b: ThingInMemory), NumericConstant(_, _))) =>
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CompoundConstant(MathOperator.Plus | MathOperator.Minus, MemoryAddressConstant(b: ThingInMemory), NumericConstant(_, _))) =>
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a.name.takeWhile(_ != '.') != b.name.takeWhile(_ != '.') // TODO: ???
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case (CompoundConstant(MathOperator.Plus | MathOperator.Minus, MemoryAddressConstant(a: ThingInMemory), NumericConstant(_, _)),
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CompoundConstant(MathOperator.Plus | MathOperator.Minus, MemoryAddressConstant(b: ThingInMemory), NumericConstant(_, _))) =>
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CompoundConstant(MathOperator.Plus | MathOperator.Minus, MemoryAddressConstant(b: ThingInMemory), NumericConstant(_, _))) =>
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a.name.takeWhile(_ != '.') != b.name.takeWhile(_ != '.') // TODO: ???
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case _ =>
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false
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@ -400,6 +400,10 @@ trait AssemblyLinePattern extends AssemblyPattern {
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}
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}
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trait TrivialAssemblyLinePattern extends AssemblyLinePattern with (AssemblyLine => Boolean) {
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override def matchLineTo(ctx: AssemblyMatchingContext, flowInfo: FlowInfo, line: AssemblyLine): Boolean = this (line)
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}
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//noinspection LanguageFeature
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object AssemblyLinePattern {
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implicit def __implicitOpcodeIn(ops: Set[Opcode.Value]): AssemblyLinePattern = HasOpcodeIn(ops)
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@ -488,9 +492,8 @@ case class HasClear(state: State.Value) extends AssemblyLinePattern {
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flowInfo.hasClear(state)
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}
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case object Anything extends AssemblyLinePattern {
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override def matchLineTo(ctx: AssemblyMatchingContext, flowInfo: FlowInfo, line: AssemblyLine): Boolean =
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true
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case object Anything extends TrivialAssemblyLinePattern {
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override def apply(line: AssemblyLine): Boolean = true
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}
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case class Not(inner: AssemblyLinePattern) extends AssemblyLinePattern {
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@ -536,23 +539,23 @@ case object Linear extends AssemblyLinePattern {
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OpcodeClasses.AllLinear(line.opcode)
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}
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case object LinearOrBranch extends AssemblyLinePattern {
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override def matchLineTo(ctx: AssemblyMatchingContext, flowInfo: FlowInfo, line: AssemblyLine): Boolean =
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case object LinearOrBranch extends TrivialAssemblyLinePattern {
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override def apply(line: AssemblyLine): Boolean =
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OpcodeClasses.AllLinear(line.opcode) || OpcodeClasses.ShortBranching(line.opcode)
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}
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case object LinearOrLabel extends AssemblyLinePattern {
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override def matchLineTo(ctx: AssemblyMatchingContext, flowInfo: FlowInfo, line: AssemblyLine): Boolean =
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case object LinearOrLabel extends TrivialAssemblyLinePattern {
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override def apply(line: AssemblyLine): Boolean =
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line.opcode == Opcode.LABEL || OpcodeClasses.AllLinear(line.opcode)
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}
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case object ReadsA extends AssemblyLinePattern {
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override def matchLineTo(ctx: AssemblyMatchingContext, flowInfo: FlowInfo, line: AssemblyLine): Boolean =
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case object ReadsA extends TrivialAssemblyLinePattern {
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override def apply(line: AssemblyLine): Boolean =
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OpcodeClasses.ReadsAAlways(line.opcode) || line.addrMode == AddrMode.Implied && OpcodeClasses.ReadsAIfImplied(line.opcode)
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}
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case object ReadsMemory extends AssemblyLinePattern {
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override def matchLineTo(ctx: AssemblyMatchingContext, flowInfo: FlowInfo, line: AssemblyLine): Boolean =
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case object ReadsMemory extends TrivialAssemblyLinePattern {
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override def apply(line: AssemblyLine): Boolean =
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line.addrMode match {
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case AddrMode.Indirect => true
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case AddrMode.Implied | AddrMode.Immediate => false
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@ -561,51 +564,51 @@ case object ReadsMemory extends AssemblyLinePattern {
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}
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}
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case object ReadsX extends AssemblyLinePattern {
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case object ReadsX extends TrivialAssemblyLinePattern {
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val XAddrModes = Set(AddrMode.AbsoluteX, AddrMode.IndexedX, AddrMode.ZeroPageX, AddrMode.AbsoluteIndexedX)
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override def matchLineTo(ctx: AssemblyMatchingContext, flowInfo: FlowInfo, line: AssemblyLine): Boolean =
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override def apply(line: AssemblyLine): Boolean =
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OpcodeClasses.ReadsXAlways(line.opcode) || XAddrModes(line.addrMode)
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}
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case object ReadsY extends AssemblyLinePattern {
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case object ReadsY extends TrivialAssemblyLinePattern {
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val YAddrModes = Set(AddrMode.AbsoluteY, AddrMode.IndexedY, AddrMode.ZeroPageY)
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override def matchLineTo(ctx: AssemblyMatchingContext, flowInfo: FlowInfo, line: AssemblyLine): Boolean =
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override def apply(line: AssemblyLine): Boolean =
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OpcodeClasses.ReadsYAlways(line.opcode) || YAddrModes(line.addrMode)
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}
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case object ConcernsC extends AssemblyLinePattern {
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override def matchLineTo(ctx: AssemblyMatchingContext, flowInfo: FlowInfo, line: AssemblyLine): Boolean =
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case object ConcernsC extends TrivialAssemblyLinePattern {
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override def apply(line: AssemblyLine): Boolean =
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OpcodeClasses.ReadsC(line.opcode) && OpcodeClasses.ChangesC(line.opcode)
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}
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case object ConcernsA extends AssemblyLinePattern {
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override def matchLineTo(ctx: AssemblyMatchingContext, flowInfo: FlowInfo, line: AssemblyLine): Boolean =
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case object ConcernsA extends TrivialAssemblyLinePattern {
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override def apply(line: AssemblyLine): Boolean =
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OpcodeClasses.ConcernsAAlways(line.opcode) || line.addrMode == AddrMode.Implied && OpcodeClasses.ConcernsAIfImplied(line.opcode)
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}
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case object ConcernsX extends AssemblyLinePattern {
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case object ConcernsX extends TrivialAssemblyLinePattern {
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val XAddrModes = Set(AddrMode.AbsoluteX, AddrMode.IndexedX, AddrMode.ZeroPageX)
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override def matchLineTo(ctx: AssemblyMatchingContext, flowInfo: FlowInfo, line: AssemblyLine): Boolean =
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override def apply(line: AssemblyLine): Boolean =
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OpcodeClasses.ConcernsXAlways(line.opcode) || XAddrModes(line.addrMode)
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}
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case object ConcernsY extends AssemblyLinePattern {
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case object ConcernsY extends TrivialAssemblyLinePattern {
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val YAddrModes = Set(AddrMode.AbsoluteY, AddrMode.IndexedY, AddrMode.ZeroPageY)
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override def matchLineTo(ctx: AssemblyMatchingContext, flowInfo: FlowInfo, line: AssemblyLine): Boolean =
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override def apply(line: AssemblyLine): Boolean =
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OpcodeClasses.ConcernsYAlways(line.opcode) || YAddrModes(line.addrMode)
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}
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case object ChangesA extends AssemblyLinePattern {
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override def matchLineTo(ctx: AssemblyMatchingContext, flowInfo: FlowInfo, line: AssemblyLine): Boolean =
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case object ChangesA extends TrivialAssemblyLinePattern {
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override def apply(line: AssemblyLine): Boolean =
|
||||
OpcodeClasses.ChangesAAlways(line.opcode) || line.addrMode == AddrMode.Implied && OpcodeClasses.ChangesAIfImplied(line.opcode)
|
||||
}
|
||||
|
||||
case object ChangesMemory extends AssemblyLinePattern {
|
||||
override def matchLineTo(ctx: AssemblyMatchingContext, flowInfo: FlowInfo, line: AssemblyLine): Boolean =
|
||||
case object ChangesMemory extends TrivialAssemblyLinePattern {
|
||||
override def apply(line: AssemblyLine): Boolean =
|
||||
OpcodeClasses.ChangesMemoryAlways(line.opcode) || line.addrMode != AddrMode.Implied && OpcodeClasses.ChangesMemoryIfNotImplied(line.opcode)
|
||||
}
|
||||
|
||||
@ -620,9 +623,9 @@ case class DoesntChangeMemoryAt(addrMode1: Int, param1: Int) extends AssemblyLin
|
||||
}
|
||||
}
|
||||
|
||||
case object ConcernsMemory extends AssemblyLinePattern {
|
||||
override def matchLineTo(ctx: AssemblyMatchingContext, flowInfo: FlowInfo, line: AssemblyLine): Boolean =
|
||||
ReadsMemory.matchLineTo(ctx, flowInfo, line) && ChangesMemory.matchLineTo(ctx, flowInfo, line)
|
||||
case object ConcernsMemory extends TrivialAssemblyLinePattern {
|
||||
override def apply(line: AssemblyLine): Boolean =
|
||||
ReadsMemory(line) && ChangesMemory(line)
|
||||
}
|
||||
|
||||
case class DoesNotConcernMemoryAt(addrMode1: Int, param1: Int) extends AssemblyLinePattern {
|
||||
@ -635,36 +638,36 @@ case class DoesNotConcernMemoryAt(addrMode1: Int, param1: Int) extends AssemblyL
|
||||
}
|
||||
}
|
||||
|
||||
case class HasOpcode(op: Opcode.Value) extends AssemblyLinePattern {
|
||||
override def matchLineTo(ctx: AssemblyMatchingContext, flowInfo: FlowInfo, line: AssemblyLine): Boolean =
|
||||
case class HasOpcode(op: Opcode.Value) extends TrivialAssemblyLinePattern {
|
||||
override def apply(line: AssemblyLine): Boolean =
|
||||
line.opcode == op
|
||||
|
||||
override def toString: String = op.toString
|
||||
}
|
||||
|
||||
case class HasOpcodeIn(ops: Set[Opcode.Value]) extends AssemblyLinePattern {
|
||||
override def matchLineTo(ctx: AssemblyMatchingContext, flowInfo: FlowInfo, line: AssemblyLine): Boolean =
|
||||
case class HasOpcodeIn(ops: Set[Opcode.Value]) extends TrivialAssemblyLinePattern {
|
||||
override def apply(line: AssemblyLine): Boolean =
|
||||
ops(line.opcode)
|
||||
|
||||
override def toString: String = ops.mkString("{", ",", "}")
|
||||
}
|
||||
|
||||
case class HasAddrMode(am: AddrMode.Value) extends AssemblyLinePattern {
|
||||
override def matchLineTo(ctx: AssemblyMatchingContext, flowInfo: FlowInfo, line: AssemblyLine): Boolean =
|
||||
case class HasAddrMode(am: AddrMode.Value) extends TrivialAssemblyLinePattern {
|
||||
override def apply(line: AssemblyLine): Boolean =
|
||||
line.addrMode == am
|
||||
|
||||
override def toString: String = am.toString
|
||||
}
|
||||
|
||||
case class HasAddrModeIn(ams: Set[AddrMode.Value]) extends AssemblyLinePattern {
|
||||
override def matchLineTo(ctx: AssemblyMatchingContext, flowInfo: FlowInfo, line: AssemblyLine): Boolean =
|
||||
case class HasAddrModeIn(ams: Set[AddrMode.Value]) extends TrivialAssemblyLinePattern {
|
||||
override def apply(line: AssemblyLine): Boolean =
|
||||
ams(line.addrMode)
|
||||
|
||||
override def toString: String = ams.mkString("{", ",", "}")
|
||||
}
|
||||
|
||||
case class HasImmediate(i: Int) extends AssemblyLinePattern {
|
||||
override def matchLineTo(ctx: AssemblyMatchingContext, flowInfo: FlowInfo, line: AssemblyLine): Boolean =
|
||||
case class HasImmediate(i: Int) extends TrivialAssemblyLinePattern {
|
||||
override def apply(line: AssemblyLine): Boolean =
|
||||
line.addrMode == AddrMode.Immediate && (line.parameter.quickSimplify match {
|
||||
case NumericConstant(j, _) => (i & 0xff) == (j & 0xff)
|
||||
case _ => false
|
||||
@ -751,4 +754,22 @@ case class HasCallerCount(count: Int) extends AssemblyLinePattern {
|
||||
case AssemblyLine(Opcode.LABEL, _, MemoryAddressConstant(Label(l)), _) => flowInfo.labelUseCount(l) == count
|
||||
case _ => false
|
||||
}
|
||||
}
|
||||
|
||||
case class MatchElidableCopyOf(i: Int, firstLinePattern: AssemblyLinePattern, lastLinePattern: AssemblyLinePattern) extends AssemblyPattern {
|
||||
override def matchTo(ctx: AssemblyMatchingContext, code: List[(FlowInfo, AssemblyLine)]): Option[List[(FlowInfo, AssemblyLine)]] = {
|
||||
val pattern = ctx.get[List[AssemblyLine]](i)
|
||||
if (code.length < pattern.length) return None
|
||||
val (before, after) = code.splitAt(pattern.length)
|
||||
val lastIndex = code.length - 1
|
||||
for (((a, (f, b)), ix) <- pattern.zip(before).zipWithIndex) {
|
||||
if (!b.elidable) return None
|
||||
if (a.opcode != b.opcode) return None
|
||||
if (a.addrMode != b.addrMode) return None
|
||||
if (a.parameter.quickSimplify != b.parameter.quickSimplify) return None
|
||||
if (ix == 0 && !firstLinePattern.matchLineTo(ctx, f, b)) return None
|
||||
if (ix == lastIndex && !lastLinePattern.matchLineTo(ctx, f, b)) return None
|
||||
}
|
||||
Some(after)
|
||||
}
|
||||
}
|
||||
129
src/test/scala/millfork/test/BitPackingSuite.scala
Normal file
129
src/test/scala/millfork/test/BitPackingSuite.scala
Normal file
@ -0,0 +1,129 @@
|
||||
package millfork.test
|
||||
|
||||
import millfork.error.ErrorReporting
|
||||
import millfork.test.emu.EmuBenchmarkRun
|
||||
import org.scalatest.{FunSuite, Matchers}
|
||||
|
||||
/**
|
||||
* @author Karol Stasiak
|
||||
*/
|
||||
class BitPackingSuite extends FunSuite with Matchers {
|
||||
|
||||
test("Unpack bits from a byte") {
|
||||
EmuBenchmarkRun("""
|
||||
| array output[8]
|
||||
| word output_addr @$c000
|
||||
| void main () {
|
||||
| byte b
|
||||
| output_addr = output.addr
|
||||
| b = $56
|
||||
| barrier()
|
||||
| byte i
|
||||
| for i,0,until,8 {
|
||||
| output[i] = b & 1
|
||||
| b >>= 1
|
||||
| }
|
||||
| }
|
||||
| void barrier() {}
|
||||
""".stripMargin){m =>
|
||||
val addr = m.readWord(0xc000)
|
||||
m.readByte(addr) should equal(0)
|
||||
m.readByte(addr + 1) should equal(1)
|
||||
m.readByte(addr + 2) should equal(1)
|
||||
m.readByte(addr + 3) should equal(0)
|
||||
m.readByte(addr + 4) should equal(1)
|
||||
m.readByte(addr + 5) should equal(0)
|
||||
m.readByte(addr + 6) should equal(1)
|
||||
m.readByte(addr + 7) should equal(0)
|
||||
}
|
||||
}
|
||||
|
||||
test("Unpack bits from a word") {
|
||||
EmuBenchmarkRun("""
|
||||
| array output[16]
|
||||
| word output_addr @$c000
|
||||
| void main () {
|
||||
| word w
|
||||
| output_addr = output.addr
|
||||
| w = $CC56
|
||||
| barrier()
|
||||
| byte i
|
||||
| for i,0,until,16 {
|
||||
| output[i] = w.lo & 1
|
||||
| w >>= 1
|
||||
| }
|
||||
| }
|
||||
| void barrier() {}
|
||||
""".stripMargin){m =>
|
||||
val addr = m.readWord(0xc000)
|
||||
m.readByte(addr) should equal(0)
|
||||
m.readByte(addr + 1) should equal(1)
|
||||
m.readByte(addr + 2) should equal(1)
|
||||
m.readByte(addr + 3) should equal(0)
|
||||
m.readByte(addr + 4) should equal(1)
|
||||
m.readByte(addr + 5) should equal(0)
|
||||
m.readByte(addr + 6) should equal(1)
|
||||
m.readByte(addr + 7) should equal(0)
|
||||
m.readByte(addr + 8) should equal(0)
|
||||
m.readByte(addr + 9) should equal(0)
|
||||
m.readByte(addr + 10) should equal(1)
|
||||
m.readByte(addr + 11) should equal(1)
|
||||
m.readByte(addr + 12) should equal(0)
|
||||
m.readByte(addr + 13) should equal(0)
|
||||
m.readByte(addr + 14) should equal(1)
|
||||
m.readByte(addr + 15) should equal(1)
|
||||
}
|
||||
}
|
||||
|
||||
test("Pack bits into byte") {
|
||||
EmuBenchmarkRun("""
|
||||
| byte output @$C000
|
||||
| array input = [$F0, 1, 0, $41, $10, 1, $61, 0]
|
||||
| void main () {
|
||||
| byte i
|
||||
| output = 0
|
||||
| for i,0,until,8 {
|
||||
| output <<= 1
|
||||
| output |= input[i] & 1
|
||||
| }
|
||||
| }
|
||||
""".stripMargin){m =>
|
||||
m.readByte(0xc000) should equal(0x56)
|
||||
}
|
||||
}
|
||||
|
||||
test("Pack bits into word") {
|
||||
EmuBenchmarkRun("""
|
||||
| word output @$C000
|
||||
| array input = [$F0, 1, 0, $41, $10, 1, $61, 0,
|
||||
| 1, 1, 0, 0, 0, 0, 1, 1]
|
||||
| void main () {
|
||||
| byte i
|
||||
| output = 0
|
||||
| for i,0,until,16 {
|
||||
| output <<= 1
|
||||
| output |= input[i] & 1
|
||||
| }
|
||||
| }
|
||||
""".stripMargin){m =>
|
||||
m.readWord(0xc000) should equal(0x56C3)
|
||||
}
|
||||
}
|
||||
|
||||
test("Pack bits into byte using plus") {
|
||||
EmuBenchmarkRun("""
|
||||
| byte output @$C000
|
||||
| array input = [$F0, 1, 0, $41, $10, 1, $61, 0]
|
||||
| void main () {
|
||||
| byte i
|
||||
| output = 0
|
||||
| for i,0,until,8 {
|
||||
| output <<= 1
|
||||
| output += (input[i] & 1)
|
||||
| }
|
||||
| }
|
||||
""".stripMargin){m =>
|
||||
m.readByte(0xc000) should equal(0x56)
|
||||
}
|
||||
}
|
||||
}
|
||||
Loading…
Reference in New Issue
Block a user