From 127cd1b901114303c60988ceff97ba0fc02833b2 Mon Sep 17 00:00:00 2001 From: Karol Stasiak Date: Sun, 4 Aug 2019 13:42:00 +0200 Subject: [PATCH] 6502: Fix word multiplication by 0 --- CHANGELOG.md | 2 ++ .../assembly/mos/opt/ZeropageRegisterOptimizations.scala | 2 +- 2 files changed, 3 insertions(+), 1 deletion(-) diff --git a/CHANGELOG.md b/CHANGELOG.md index ddfa6211..8a35047b 100644 --- a/CHANGELOG.md +++ b/CHANGELOG.md @@ -47,6 +47,8 @@ This matches both the CC65 behaviour and the return values from `readkey()`. * 6502: miscompilation when using the zeropage pseudoregister; * 6502: stack overflow when inlining local variables into registers; + + * 6502: not setting the high byte to 0 when optimizing word multiplication by 0 * 8080/Z80: compiler crash when compiling conditions; diff --git a/src/main/scala/millfork/assembly/mos/opt/ZeropageRegisterOptimizations.scala b/src/main/scala/millfork/assembly/mos/opt/ZeropageRegisterOptimizations.scala index c2a037a2..dda441ac 100644 --- a/src/main/scala/millfork/assembly/mos/opt/ZeropageRegisterOptimizations.scala +++ b/src/main/scala/millfork/assembly/mos/opt/ZeropageRegisterOptimizations.scala @@ -107,7 +107,7 @@ object ZeropageRegisterOptimizations { (Elidable & HasOpcode(JSR) & RefersTo("__mul_u16u8u16", 0)) ~~> { (code, ctx) => val constant = ctx.get[Int](4) if (constant == 0) { - code.init :+ AssemblyLine.immediate(LDA, 0) + code.init ++ List(AssemblyLine.immediate(LDA, 0), AssemblyLine.immediate(LDX, 0)) } else { val loAsl = code.head.copy(opcode = ASL, parameter = (code.head.parameter - 2).quickSimplify) val hiRol = code.head.copy(opcode = ROL, parameter = (code.head.parameter - 1).quickSimplify)