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Add 8080-to-8086 translation
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Karol Stasiak
@@ -76,3 +76,45 @@ and the most significant word is passed via the DE register pair
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* callee may clobber all registers except for IX, IY and shadow registers
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## 8086
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The Intel 8086 calling conventions is based on the Intel 8080 calling convention,
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plus it uses the BP register in the same role as the IX register of Z80.
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#### Parameters:
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* if the function has one parameter of size one byte, it is passed via the AL register
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* if the function has one parameter of size two bytes, it is passed via the BX register
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* if the function has one parameter of size three bytes,
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its least significant two bytes are passed via the BX register
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and the most significant byte is passed via the DL register
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* if the function has one parameter of size four bytes,
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its least significant word is passed via the BX register
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and the most significant word is passed via the DX register
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* otherwise, all parameters are passed via static locations
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#### Return values:
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* one-byte return values are passed via the AL register
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* two-byte return values are passed via the BX register
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* in case of three-byte return values,
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its least significant two bytes are passed via the BX register
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and the most significant byte is passed via the DL register
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* in case of four-byte return values,
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its least significant word is passed via the BX register
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and the most significant word is passed via the DX register
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* otherwise, the return value is passed via a static location
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#### Register preservation:
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* callee may clobber all flags
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* callee may clobber all registers except for BP
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@@ -69,3 +69,7 @@ AHX, LAS, LXA, SHX, SHY, TAS, XAA.
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Original Z80 processors accidentally supported a bunch of extra undocumented instructions.
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Millfork will not emit them.
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The only exception is SLL, which will be emitted if it occurs in a handwritten assembly block.
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## 8086
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Undocumented instructions are not supported.
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@@ -63,6 +63,9 @@ this makes stack-allocated variables independent from other stack operations
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and allows for optimizing them by inlining them into registers
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(this can be disabled, so the 8080 method is used, or switched to use IY instead)
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* on 8086, the BP register is used as the base pointer, behaving similarly to the IX register on Z80
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(this can be disabled, so the 8080 method is used, with the target address register being BX instead of HL)
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## Automatic variables
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Automatic variables have lifetime starting with the beginning of the function they're in
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@@ -32,6 +32,9 @@ if a line ends with a backslash character, the value continues to the next line.
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* `i8080` (Intel 8080; experimental, buggy and very incomplete)
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* `gameboy` (Sharp LR35902; experimental, buggy and very incomplete)
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* `i8086` (Intel 8086; very experimental, very buggy and very, very incomplete –
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see the [8086 support disclaimer](../lang/x86disclaimer.md))
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* `encoding` – default encoding for console I/O, one of
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`ascii`, `pet`/`petscii`, `petscr`/`cbmscr`, `atascii`, `bbc`, `jis`/`jisx`, `apple2`,
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@@ -87,6 +87,8 @@ The compiler emits COM files.
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* `cpm_z80` – CP/M on Z80
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* `dos_com` – a COM file for DOS on IBM PC. (very experimental)
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The primary and most tested platform is Commodore 64.
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Currently, targets that assume that the program will be loaded from disk or tape are better tested.
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+4
-1
@@ -18,7 +18,7 @@ The goal of Millfork is to succeed where Atalan failed.
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Large programs in Millfork have been developed for Commodore 64.
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Millfork was also tested (via emulators) to run trivial programs on other 8-bit Commodore computers,
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Atari 8-bit computers, Apple II, BBC Micro, ZX Spectrum 48k, NEC PC-88, CP/M, NES, Game Boy and Atari 2600.
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Atari 8-bit computers, Apple II, BBC Micro, ZX Spectrum 48k, NEC PC-88, CP/M, NES, Game Boy, Atari 2600 and MS-DOS.
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Support for other devices using supported processors can be easily added, usually without even modifying the compiler.
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@@ -28,6 +28,9 @@ Support for other devices using supported processors can be easily added, usuall
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* Intel 8080, Zilog Z80, Sharp LR35902 (also known as GBZ80)
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* There is also partial experimental support for Intel 8086, via automatic 8080-to-8086 translation.
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The generated code is very large and very slow.
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### Why Millfork when I can use assembly?
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* Assembly will not be portable. If you want to target both 6502 and Z80, you'd have to maintain two separate codebases.
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@@ -16,7 +16,8 @@ Syntax:
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* `asm` – the function is written in assembly, not in Millfork (obligatory for `extern` functions),
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see [Using 6502 assembly within Millfork programs#Assembly functions](./assembly.md#assembly-functions)
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or [Using 8080/LR35902/Z80 assembly within Millfork programs#Assembly functions](./assemblyz80.md#assembly-functions)
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or [Using 8080/LR35902/Z80 assembly within Millfork programs#Assembly functions](./assemblyz80.md#assembly-functions);
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for 8086, see the [8086 support disclaimer](./x86disclaimer.md).
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* `macro` – the function is a macro,
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see [Macros_and inlining#Macros](../abi/inlining.md#macros)
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@@ -38,6 +38,8 @@ The following features are defined based on the chosen CPU and compilation optio
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* `ARCH_I80` – 1 if compiling for Intel 8080-like processor, 0 otherwise
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* `ARCH_X86` – 1 if compiling for Intel 8086-like processor, 0 otherwise
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* `CPU_65C02`, `CPU_65CE02`, `CPU_65816`, `CPU_HUC6280`, `CPU_8080`, `CPU_GAMEBOY`, `CPU_Z80`
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– 1 if compiling for the exact given processor, 0 otherwise
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@@ -86,6 +88,8 @@ The following features are defined based on the chosen CPU and compilation optio
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* `CPM` – 1 if the target is CP/M, 0 otherwise
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* `IBM_PC` – 1 if the target is IBM PC, 0 otherwise
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* `NTSC` – 1 if the target is NTSC, 0 otherwise
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* `PAL` – 1 if the target is PAL, 0 otherwise
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+1
-1
@@ -324,4 +324,4 @@ continue <variable>
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See [Using 6502 assembly within Millfork programs](./assembly.md)
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or [Using 8080/LR35902/Z80 assembly within Millfork programs](./assemblyz80.md).
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**Work in progress**: For 8086, see the [8086 support disclaimer](./x86disclaimer.md).
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@@ -0,0 +1,78 @@
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[< back to index](../index.md)
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# 8086 support disclaimer
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Millfork does not support Intel 8086 directly.
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Instead, it generates Intel 8080 code and translates it automatically to 8086 machine code.
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For convenience, Z80 instructions using `IX` are also translated.
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This means that:
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* code is going to be large and slow;
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* there is no support for writing 8086 assembly;
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* Millfork currently translates majority of Intel 8080 assembly instructions to 8086 machine code,
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so you can write 8080/Z80 assembly instead.
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For example, code like
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asm {
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LD HL, x
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LD BC, i
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ADD HL, BC
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JP C, skip
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LD A, IX(5)
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LD (HL), A
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skip:
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}
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is compiled to
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MOV BX, x
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MOV CX, i
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ADD BX, CX
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JNC .next
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JMP skip
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.next:
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MOV AL, BYTE PTR [BP+5]
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MOV BYTE PTR [BX], AL
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skip:
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Generated assembly output uses Intel 8086 syntax.
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#### Major deficiencies of generated code
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* hardware multiplication is not used
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* many 16-bit operations are not used
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* many operations are restricted to the `AL` register
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* the overflow flag is not used
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* `DAS` is not used
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* conditional jumps are never optimized to short 2-byte jumps and always use 5 bytes
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* the `SI` register is reloaded before every use
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* the converter translates the `DAD` instruction (16-bit `ADD` on Z80) to `ADD`,
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which may change behaviour of assembly code,
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as 8080's `DAD` changes only the carry flag, and 8086's `ADD` changes many flags.
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Luckily, this is not an issue with Millfork code, as the optimizer does not assume anything about flags after that instruction.
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The proper sequence is `LAHF`/`ADD r1,r2`/`RCR SI,1`/`SAHF`/`RCL SI,1`, but it is obviously too slow.
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#### Register mapping
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The registers are translated as following:
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A → AL
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B → CH C → CL BC → CX
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D → DH E → DL DE → DX
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H → BH L → BL HL → BX
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SP → SP
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IX → BP
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The `SI` register is used as a temporary register for holding the address in `LDAX`/`STAX`
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(`LD (DE),A`/`LD(BC),A`/`LD A,(DE)`/`LD A,(BC)` on Z80).
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