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Fix init_rw_memory on Atari 2600
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@ -66,7 +66,7 @@ See [the ROM vs RAM guide](../api/rom-vs-ram.md) for more information.
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* `ZPREG_SIZE` – size of the pseudoregister in bytes, or 0 on platforms that don't use it
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* `ZPREG_SIZE` – size of the pseudoregister in bytes, or 0 on platforms that don't use it
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* `TINY_MAIN_RAM` – 1 if the main ram is 256 bytes or less, 0 otherwise
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* `TINY_RW_MEMORY` – 1 if the main ram is 256 bytes or less, 0 otherwise
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* `USES_IX_STACK`, `USES_IY_STACK` – 1 if given index register is used as a base pointer for stack-allocated variables, 0 otherwise
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* `USES_IX_STACK`, `USES_IY_STACK` – 1 if given index register is used as a base pointer for stack-allocated variables, 0 otherwise
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@ -1,4 +1,5 @@
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void main() {
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void main() {
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init_rw_memory()
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byte y
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byte y
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while true {
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while true {
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start_frame()
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start_frame()
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@ -157,16 +157,12 @@ object Platform {
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case "default" =>
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case "default" =>
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log.error("Cannot use default as ram_init_segment")
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log.error("Cannot use default as ram_init_segment")
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None
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None
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case x if banks.contains(x) =>
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case x if banks.contains(x) => Some(x)
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if (CpuFamily.forType(cpu) == CpuFamily.M6502 && zpRegisterSize < 4) {
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log.error("Using ram_init_segment requires zeropage register of size at least 4")
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}
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Some(x)
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case x =>
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case x =>
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log.error("Invalid ram_init_segment: " + x)
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log.error("Invalid ram_init_segment: " + x)
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None
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None
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}
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}
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// used by 65816:
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// used by 65816 and in NES debugging:
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val bankNumbers = banks.map(b => b -> (as.get(classOf[String], s"segment_${b}_bank", "00") match {
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val bankNumbers = banks.map(b => b -> (as.get(classOf[String], s"segment_${b}_bank", "00") match {
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case "" => 0
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case "" => 0
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case x => parseNumber(x)
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case x => parseNumber(x)
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@ -204,7 +200,7 @@ object Platform {
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val codeAllocators = banks.map(b => b -> new UpwardByteAllocator(bankStarts(b), bankCodeEnds(b)))
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val codeAllocators = banks.map(b => b -> new UpwardByteAllocator(bankStarts(b), bankCodeEnds(b)))
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val variableAllocators = banks.map(b => b -> new VariableAllocator(
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val variableAllocators = banks.map(b => b -> new VariableAllocator(
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if (b == "default" && CpuFamily.forType(cpu) == CpuFamily.M6502) freeZpBytes else Nil, bankDataStarts(b) match {
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if (b == "default" && CpuFamily.forType(cpu) == CpuFamily.M6502) freeZpBytes else Nil, bankDataStarts(b) match {
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case None => new AfterCodeByteAllocator(bankEnds(b))
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case None => new AfterCodeByteAllocator(bankStarts(b), bankEnds(b))
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case Some(start) => new UpwardByteAllocator(start, bankEnds(b))
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case Some(start) => new UpwardByteAllocator(start, bankEnds(b))
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}))
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}))
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@ -84,8 +84,8 @@ class ZeropageAllocator(val freeZpBytes: List[Int]) extends ByteAllocator {
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override def heapStart: Int = 0
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override def heapStart: Int = 0
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}
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}
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class AfterCodeByteAllocator(val endBefore: Int) extends ByteAllocator {
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class AfterCodeByteAllocator(startIfNoCode: Int, val endBefore: Int) extends ByteAllocator {
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var startAt = 0x200
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var startAt = startIfNoCode
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def notifyAboutEndOfCode(org: Int): Unit = startAt = org
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def notifyAboutEndOfCode(org: Int): Unit = startAt = org
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override def preferredOrder: Option[List[Int]] = None
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override def preferredOrder: Option[List[Int]] = None
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@ -21,7 +21,7 @@ object EmuPlatform {
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Map("default" -> (if (cpu == Cpu.Intel8086) new UpwardByteAllocator(0x100, 0xb000) else new UpwardByteAllocator(0x200, 0xb000))),
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Map("default" -> (if (cpu == Cpu.Intel8086) new UpwardByteAllocator(0x100, 0xb000) else new UpwardByteAllocator(0x200, 0xb000))),
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Map("default" -> new VariableAllocator(
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Map("default" -> new VariableAllocator(
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if (CpuFamily.forType(cpu) == CpuFamily.M6502) pointers else Nil,
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if (CpuFamily.forType(cpu) == CpuFamily.M6502) pointers else Nil,
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new AfterCodeByteAllocator(0xff00))),
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new AfterCodeByteAllocator(0x200, 0xff00))),
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if (CpuFamily.forType(cpu) == CpuFamily.M6502) 4 else 0,
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if (CpuFamily.forType(cpu) == CpuFamily.M6502) 4 else 0,
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pointers,
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pointers,
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".bin",
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".bin",
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