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Z80: Add SLS as an alternate mnemonic for SLL

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This commit is contained in:
Karol Stasiak 2020-09-27 18:46:19 +02:00
parent 3a9be16107
commit 3af4fcffa9
2 changed files with 3 additions and 3 deletions
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4
docs/lang/assemblyz80.md
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@ -263,8 +263,8 @@ Intel syntax | Zilog syntax
**SLAY d** | **SLA IY(d)**
**SRAY d** | **SRA IY(d)**
**SRLY d** | **SRL IY(d)**
**SLLR r** | **SLL r**
**SLLY d** | **SLL IY(d)**
**SLLR r** | **SLL r**, SLS r
**SLLY d** | **SLL IY(d)**, SLS IY(d)
**SPIY** | **LD SP,IY**
**PUSHIY**, PUSH IY | **PUSH IY**
**POPIY**, POP IY | **POP IY**

2
src/main/scala/millfork/parser/Z80Parser.scala
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@ -330,7 +330,7 @@ case class Z80Parser(filename: String,
case "RLC" => one8Register(RLC)
case "RRC" => one8Register(RRC)
case "SLA" => one8Register(SLA)
case "SLL" => one8Register(SLL)
case "SLL" | "SLS" => one8Register(SLL)
case "SRA" => one8RegisterOr8085Illegal(SRA, ZRegister.HL, RRHL)
case "SRL" => one8Register(SRL)
case "SWAP" => one8Register(SWAP)