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LR35902: Use autoincrement operations

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This commit is contained in:
Karol Stasiak 2019-04-16 12:10:31 +02:00
parent 629691dfb3
commit 668982cd5c
3 changed files with 41 additions and 2 deletions
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2
src/main/scala/millfork/assembly/z80/ZOpcode.scala
View File

@ -76,6 +76,6 @@ object ZOpcodeClasses {
EXX, EX_DE_HL, CALL, JR, JP, LABEL)
val ChangesOnlyRegister: Set[ZOpcode.Value] = Set(INC, DEC, INC_16, DEC_16, POP, EX_SP, IN_C, IN_IMM, RL, RR, RLC, RRC, SLA, SRA, SRL, SLL) ++ SET ++ RES
val ChangesFirstRegister = Set(LD, LD_16, ADD_16, SBC_16)
val ChangesAAlways = Set(DAA, ADD, ADC, SUB, SBC, XOR, OR, AND)
val ChangesAAlways = Set(DAA, ADD, ADC, SUB, SBC, XOR, OR, AND, LD_AHLI, LD_AHLD)
val NonLinear = Set(JP, JR, CALL, LABEL, BYTE, EXX, EX_DE_HL, EX_SP, EXX, RET, RETI, RETN, HALT)
}

13
src/main/scala/millfork/assembly/z80/opt/CoarseFlowAnalyzer.scala
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@ -172,6 +172,19 @@ object CoarseFlowAnalyzer {
copy(cf = AnyStatus, zf = AnyStatus, sf = AnyStatus, pf = AnyStatus, hf = AnyStatus).
setRegister(r, newV)
case ZLine0(LD_AHLI, _, _) =>
val newHL = currentStatus.getRegister(ZRegister.HL).map(i => i.+(1).&(0xffff))
currentStatus = currentStatus.copy(a = AnyStatus).setRegister(ZRegister.HL, newHL)
case ZLine0(LD_HLIA, _, _) =>
val newHL = currentStatus.getRegister(ZRegister.HL).map(i => i.+(1).&(0xffff))
currentStatus = currentStatus.setRegister(ZRegister.HL, newHL)
case ZLine0(LD_AHLD, _, _) =>
val newHL = currentStatus.getRegister(ZRegister.HL).map(i => i.-(1).&(0xffff))
currentStatus = currentStatus.copy(a = AnyStatus).setRegister(ZRegister.HL, newHL)
case ZLine0(LD_HLDA, _, _) =>
val newHL = currentStatus.getRegister(ZRegister.HL).map(i => i.-(1).&(0xffff))
currentStatus = currentStatus.setRegister(ZRegister.HL, newHL)
case ZLine0(op, OneRegister(r), _) if ZOpcodeClasses.SET(op) =>
currentStatus = currentStatus.setRegister(r, currentStatus.getRegister(r).map(i => i | 1.<<(ZOpcodeClasses.SET_seq.indexOf(op))))
case ZLine0(op, OneRegister(r), _) if ZOpcodeClasses.RES(op) =>

28
src/main/scala/millfork/assembly/z80/opt/LaterSharpOptimizations.scala
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@ -53,7 +53,33 @@ object LaterSharpOptimizations {
},
)
val UseAutoincrementOperations = new RuleBasedAssemblyOptimization("Use autoincrement operations",
needsFlowInfo = FlowInfoRequirement.BackwardFlow,
(Elidable & Is8BitLoad(MEM_HL, A)) ~
(Linear & Not(Concerns(HL))).* ~
(Elidable & HasOpcode(INC_16) & HasRegisterParam(HL)) ~~> { code =>
ZLine.implied(LD_HLIA) :: code.tail.init
},
(Elidable & Is8BitLoad(A, MEM_HL)) ~
(Linear & Not(Concerns(HL))).* ~
(Elidable & HasOpcode(INC_16) & HasRegisterParam(HL)) ~~> { code =>
ZLine.implied(LD_AHLI) :: code.tail.init
},
(Elidable & Is8BitLoad(MEM_HL, A)) ~
(Linear & Not(Concerns(HL))).* ~
(Elidable & HasOpcode(DEC_16) & HasRegisterParam(HL)) ~~> { code =>
ZLine.implied(LD_HLDA) :: code.tail.init
},
(Elidable & Is8BitLoad(A, MEM_HL)) ~
(Linear & Not(Concerns(HL))).* ~
(Elidable & HasOpcode(DEC_16) & HasRegisterParam(HL)) ~~> { code =>
ZLine.implied(LD_AHLD) :: code.tail.init
},
)
val All: List[AssemblyOptimization[ZLine]] = List(
UseSwap
UseSwap, UseAutoincrementOperations
)
}