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https://github.com/KarolS/millfork.git
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Optimization bugfixes
This commit is contained in:
Karol Stasiak
parent
17920cee26
commit
7bbf655e6f
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@ -103,6 +103,7 @@ object OptimizationPresets {
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AlwaysGoodOptimizations.PointlessMathFromFlow,
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AlwaysGoodOptimizations.PointlessMathFromFlow,
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AlwaysGoodOptimizations.PointlessMathFromFlow,
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AlwaysGoodOptimizations.SimplifiableCondition,
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AlwaysGoodOptimizations.IncrementingIndexRegistersAfterTransfer,
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AlwaysGoodOptimizations.MathOperationOnTwoIdenticalMemoryOperands,
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LaterOptimizations.UseZeropageAddressingMode,
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@ -154,6 +155,7 @@ object OptimizationPresets {
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AlwaysGoodOptimizations.RemoveNops,
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AlwaysGoodOptimizations.ReverseFlowAnalysis,
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AlwaysGoodOptimizations.SimplifiableBitOpsSequence,
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AlwaysGoodOptimizations.SimplifiableCondition,
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AlwaysGoodOptimizations.SmarterShiftingWords,
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AlwaysGoodOptimizations.UnconditionalJumpRemoval,
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UnusedLabelRemoval,
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@ -17,6 +17,8 @@ import millfork.env._
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object AlwaysGoodOptimizations {
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val counter = new AtomicInteger(30000)
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val LdxAddrModes = Set(Immediate, Absolute, ZeroPage, ZeroPageY, AbsoluteY)
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val LdyAddrModes = Set(Immediate, Absolute, ZeroPage, ZeroPageX, AbsoluteX)
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def getNextLabel(prefix: String) = f".$prefix%s__${counter.getAndIncrement()}%05d"
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@ -340,15 +342,22 @@ object AlwaysGoodOptimizations {
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flagsToTrash: Seq[State.Value],
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fix: ((AssemblyMatchingContext, Int) => List[AssemblyLine]),
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alternateStore: Opcode.Value = LABEL) = {
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val actualFlagsToTrash = List(State.N, State.Z) ++ flagsToTrash
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val init = Elidable & HasOpcode(store) & HasAddrMode(addrMode) & MatchAddrMode(3) & MatchParameter(0) & DoesntMatterWhatItDoesWith(actualFlagsToTrash: _*) & initExtra
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val meantime = (Linear & Not(ConcernsMemory) & meantimeExtra).*
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val oneModification = Elidable & HasOpcode(modify) & HasAddrMode(addrMode) & MatchParameter(0) & DoesntMatterWhatItDoesWith(actualFlagsToTrash: _*)
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val actualFlagsToTrashForStore = List(State.N, State.Z) ++ flagsToTrash ++ (store match{
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case STA => List(State.A)
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case STY => List(State.Y)
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case STX => List(State.X)
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case SAX => List(State.A, State.X)
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case STZ => Nil
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})
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val actualFlagsToTrashForModify = List(State.N, State.Z) ++ flagsToTrash
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val init = Elidable & HasOpcode(store) & HasAddrMode(addrMode) & MatchAddrMode(3) & MatchParameter(0) & DoesntMatterWhatItDoesWith(actualFlagsToTrashForStore: _*) & initExtra
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val meantime = (Linear & DoesNotConcernMemoryAt(3, 0) & meantimeExtra).*
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val oneModification = Elidable & HasOpcode(modify) & HasAddrMode(addrMode) & MatchParameter(0) & DoesntMatterWhatItDoesWith(actualFlagsToTrashForModify: _*)
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val modifications = (if (atLeastTwo) oneModification ~ oneModification.+ else oneModification.+).captureLength(1)
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if (alternateStore == LABEL) {
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((init ~ meantime).capture(2) ~ modifications) ~~> ((code, ctx) => fix(ctx, ctx.get[Int](1)) ++ ctx.get[List[AssemblyLine]](2))
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} else {
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(init.capture(3) ~ meantime.capture(2) ~ modifications) ~~> { (code, ctx) =>
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(init ~ meantime.capture(2) ~ modifications) ~~> { (code, ctx) =>
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fix(ctx, ctx.get[Int](1)) ++
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List(AssemblyLine(alternateStore, ctx.get[AddrMode.Value](3), ctx.get[Constant](0))) ++
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ctx.get[List[AssemblyLine]](2)
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@ -356,8 +365,8 @@ object AlwaysGoodOptimizations {
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}
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}
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val ModificationOfJustWrittenValue = new RuleBasedAssemblyOptimization("Modification of Just written value",
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needsFlowInfo = FlowInfoRequirement.ForwardFlow,
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val ModificationOfJustWrittenValue = new RuleBasedAssemblyOptimization("Modification of just written value",
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needsFlowInfo = FlowInfoRequirement.BothFlows,
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modificationOfJustWrittenValue(STA, Absolute, MatchA(5), INC, Anything, atLeastTwo = false, Seq(), (c, i) => List(
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AssemblyLine.immediate(LDA, (c.get[Int](5) + i) & 0xff)
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)),
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@ -572,10 +581,10 @@ object AlwaysGoodOptimizations {
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val PointlessLoadBeforeTransfer = new RuleBasedAssemblyOptimization("Pointless load before transfer",
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needsFlowInfo = FlowInfoRequirement.BackwardFlow,
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loadBeforeTransfer(LDX, LDA, ConcernsX, State.X, TXA, Set(Immediate, ZeroPage, Absolute, IndexedY, AbsoluteY)),
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loadBeforeTransfer(LDA, LDX, ConcernsA, State.A, TAX, Set(Immediate, ZeroPage, Absolute, IndexedY, AbsoluteY)),
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loadBeforeTransfer(LDY, LDA, ConcernsY, State.Y, TYA, Set(Immediate, ZeroPage, Absolute, ZeroPageX, IndexedX, AbsoluteX)),
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loadBeforeTransfer(LDA, LDY, ConcernsA, State.A, TAY, Set(Immediate, ZeroPage, Absolute, ZeroPageX, IndexedX, AbsoluteX)),
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loadBeforeTransfer(LDX, LDA, ConcernsX, State.X, TXA, LdxAddrModes),
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loadBeforeTransfer(LDA, LDX, ConcernsA, State.A, TAX, LdxAddrModes),
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loadBeforeTransfer(LDY, LDA, ConcernsY, State.Y, TYA, LdyAddrModes),
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loadBeforeTransfer(LDA, LDY, ConcernsA, State.A, TAY, LdyAddrModes),
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)
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private def immediateLoadBeforeTwoTransfers(ld1: Opcode.Value, ld2: Opcode.Value, concerns1: AssemblyLinePattern, overwrites1: State.Value, t12: Opcode.Value, t21: Opcode.Value) =
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@ -698,17 +707,21 @@ object AlwaysGoodOptimizations {
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val stax = if (hiFromX) STX else STA
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val restriction = if (hiFromX) Not(ReadsX) else Anything
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val originalStart = if (hiFirst) {
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(Elidable & HasOpcode(LDA) & MatchParameter(0) & MatchAddrMode(1)) ~
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(Elidable & HasOpcode(STA) & MatchParameter(2) & MatchAddrMode(3) & restriction) ~
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(Elidable & HasOpcode(ldax) & HasImmediate(0)) ~
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(Elidable & HasOpcode(stax) & MatchParameter(4) & MatchAddrMode(5))
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} else {
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(Elidable & HasOpcode(ldax) & HasImmediate(0)) ~
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(HasOpcode(ldax) & HasImmediate(0)) ~
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(Elidable & HasOpcode(stax) & MatchParameter(4) & MatchAddrMode(5)) ~
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(Elidable & HasOpcode(LDA) & MatchParameter(0) & MatchAddrMode(1)) ~
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(Elidable & HasOpcode(STA) & MatchParameter(2) & MatchAddrMode(3) & restriction)
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(HasOpcode(LDA) & MatchParameter(0) & MatchAddrMode(1) & DoesNotConcernMemoryAt(5, 4)) ~
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(Elidable & HasOpcode(STA) & MatchParameter(2) & MatchAddrMode(3) & DoesntChangeMemoryAt(1, 0) & DoesntChangeMemoryAt(5, 4) & restriction)
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} else {
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(HasOpcode(LDA) & MatchParameter(0) & MatchAddrMode(1)) ~
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(Elidable & HasOpcode(STA) & MatchParameter(2) & MatchAddrMode(3) & DoesntChangeMemoryAt(1, 0) & restriction) ~
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(HasOpcode(ldax) & HasImmediate(0)) ~
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(Elidable & HasOpcode(stax) & MatchParameter(4) & MatchAddrMode(5) & DoesntChangeMemoryAt(1, 0) & DoesntChangeMemoryAt(3, 2))
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}
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val middle = (Linear & Not(ConcernsMemory) & DoesntChangeIndexingInAddrMode(3) & DoesntChangeIndexingInAddrMode(5)).*
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val middle = (Linear
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& DoesntChangeIndexingInAddrMode(3)
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& DoesntChangeIndexingInAddrMode(5)
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& DoesNotConcernMemoryAt(3, 2)
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& DoesNotConcernMemoryAt(5, 4)).*
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val singleOriginalShift =
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(Elidable & HasOpcode(ASL) & MatchParameter(2) & MatchAddrMode(3)) ~
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(Elidable & HasOpcode(ROL) & MatchParameter(4) & MatchAddrMode(5) & DoesntMatterWhatItDoesWith(State.C, State.N, State.V, State.Z))
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@ -1092,4 +1105,27 @@ object AlwaysGoodOptimizations {
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code.tail.init :+ code.head
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},
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)
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private def remapZ2N(line: AssemblyLine) = line.opcode match {
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case BNE => line.copy(opcode = BMI)
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case BEQ => line.copy(opcode = BPL)
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}
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private def remapZ2V(line: AssemblyLine) = line.opcode match {
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case BNE => line.copy(opcode = BVS)
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case BEQ => line.copy(opcode = BVC)
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}
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val SimplifiableCondition = new RuleBasedAssemblyOptimization("Simplifiable condition",
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needsFlowInfo = FlowInfoRequirement.BackwardFlow,
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HasOpcode(LDA) ~
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(Elidable & HasOpcode(AND) & HasImmediate(0x80)) ~
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(Elidable & HasOpcodeIn(Set(BNE, BEQ)) & DoesntMatterWhatItDoesWith(State.A, State.N, State.Z)) ~~> {code =>
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List(code(0), remapZ2N(code(2)))
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},
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(Elidable & HasOpcode(LDA) & HasImmediate(0x80)) ~
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(Elidable & HasOpcode(AND)) ~
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(Elidable & HasOpcodeIn(Set(BNE, BEQ)) & DoesntMatterWhatItDoesWith(State.A, State.N, State.Z)) ~~> {code =>
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List(code(1).copy(opcode = LDA), remapZ2N(code(2)))
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},
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)
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}
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@ -46,6 +46,18 @@ object Status {
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SingleStatus(y >= 0x80)
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case _ => AnyStatus()
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}
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def adc(value: Int, carry: Status[Boolean], decimal: Status[Boolean]): Status[Int] = inner match {
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case SingleStatus(x) => decimal match {
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case SingleStatus(false) => carry match {
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case SingleStatus(true) => SingleStatus(x + value + 1)
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case SingleStatus(false) => SingleStatus(x + value)
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case _ => AnyStatus()
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}
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case _ => AnyStatus()
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}
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case _ => AnyStatus()
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}
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}
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}
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@ -195,6 +207,10 @@ object CoarseFlowAnalyzer {
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val n = nn.toInt
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currentStatus = currentStatus.nz(n).copy(a = SingleStatus(n), x = SingleStatus(n))
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case AssemblyLine(ADC, Immediate, NumericConstant(nn, _), _) =>
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val n = nn.toInt
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val newA = currentStatus.a.adc(n, currentStatus.c, currentStatus.d)
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currentStatus = currentStatus.copy(n = newA.n(), z = newA.z(), a = newA, c = AnyStatus(), v = AnyStatus())
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case AssemblyLine(EOR, Immediate, NumericConstant(nn, _), _) =>
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val n = nn.toInt
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currentStatus = currentStatus.copy(n = currentStatus.a.n(_ ^ n), z = currentStatus.a.z(_ ^ n), a = currentStatus.a.map(_ ^ n))
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@ -236,6 +252,11 @@ object CoarseFlowAnalyzer {
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case AssemblyLine(TYA, _, _, _) =>
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currentStatus = currentStatus.copy(a = currentStatus.y, n = currentStatus.y.n(), z = currentStatus.y.z())
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case AssemblyLine(ASL, Implied, _, _) =>
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currentStatus = currentStatus.copy(a = currentStatus.a.map(_ << 1), n = currentStatus.a.n(_ << 1), z = currentStatus.a.z(_ << 1),c = currentStatus.a.map(a => a.&(0xff).!=(0)))
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case AssemblyLine(LSR, Implied, _, _) =>
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currentStatus = currentStatus.copy(a = currentStatus.a.map(a => a.>>(1).&(0x7f)), n = currentStatus.a.n(a => a.>>(1).&(0x7f)), z = currentStatus.a.z(a => a.>>(1).&(0x7f)),c = currentStatus.a.map(a => a.&(1).!=(0)))
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case AssemblyLine(opcode, addrMode, parameter, _) =>
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if (OpcodeClasses.ChangesX(opcode)) currentStatus = currentStatus.copy(x = AnyStatus())
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if (OpcodeClasses.ChangesY(opcode)) currentStatus = currentStatus.copy(y = AnyStatus())
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@ -244,7 +244,7 @@ object LaterOptimizations {
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// TODO: make it more generic
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val IndexSwitchingOptimization = new RuleBasedAssemblyOptimization("Index switching optimization",
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needsFlowInfo = FlowInfoRequirement.BackwardFlow,
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(Elidable & HasOpcode(LDY) & MatchAddrMode(2) & Not(ReadsX) & MatchParameter(0)) ~
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(Elidable & HasOpcode(LDY) & MatchAddrMode(2) & Not(ReadsX) & MatchParameter(0) & HasAddrModeIn(LdxAddrModes)) ~
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(Elidable & Linear & Not(ChangesY) & HasAddrMode(AbsoluteY) & SupportsAbsoluteX & Not(ConcernsX)) ~
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(HasOpcode(LDY) & Not(ConcernsX)) ~
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(Linear & Not(ChangesY) & Not(ConcernsX) & HasAddrModeIn(Set(AbsoluteY, IndexedY, ZeroPageY))) ~
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@ -257,7 +257,7 @@ object LaterOptimizations {
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code(3),
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code(5).copy(addrMode = AbsoluteX))
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},
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(Elidable & HasOpcode(LDX) & MatchAddrMode(2) & Not(ReadsY) & MatchParameter(0)) ~
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(Elidable & HasOpcode(LDX) & MatchAddrMode(2) & Not(ReadsY) & MatchParameter(0) & HasAddrModeIn(LdyAddrModes)) ~
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(Elidable & Linear & Not(ChangesX) & HasAddrMode(AbsoluteX) & SupportsAbsoluteY & Not(ConcernsY)) ~
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(HasOpcode(LDX) & Not(ConcernsY)) ~
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(Linear & Not(ChangesX) & Not(ConcernsY) & HasAddrModeIn(Set(AbsoluteX, IndexedX, ZeroPageX, AbsoluteIndexedX))) ~
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@ -55,14 +55,15 @@ case class CpuImportance(a: Importance = UnknownImportance,
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)
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def isUnimportant(state: State.Value): Boolean = state match {
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case State.A => a == Unimportant
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case State.X => x == Unimportant
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case State.Y => y == Unimportant
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case State.Z => z == Unimportant
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case State.N => n == Unimportant
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case State.C => c == Unimportant
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case State.V => v == Unimportant
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case State.D => d == Unimportant
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// UnknownImportance is usually an effect of unreachable code
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case State.A => a != Important
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case State.X => x != Important
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case State.Y => y != Important
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case State.Z => z != Important
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case State.N => n != Important
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case State.C => c != Important
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case State.V => v != Important
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case State.D => d != Important
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}
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}
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@ -97,8 +98,16 @@ object ReverseFlowAnalyzer {
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case _ =>
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}
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codeArray(i) match {
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case AssemblyLine(JSR, _, MemoryAddressConstant(fun:FunctionInMemory), _) =>
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var result = new CpuImportance().copy(d = Important)
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case AssemblyLine(JSR | JMP, Absolute, MemoryAddressConstant(fun:FunctionInMemory), _) =>
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var result = new CpuImportance(
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a = Unimportant,
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x = Unimportant,
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y = Unimportant,
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z = Unimportant,
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n = Unimportant,
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c = Unimportant,
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v = Unimportant,
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d = Important)
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fun.params match {
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case AssemblyParamSignature(params) =>
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params.foreach(_.variable match {
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@ -119,16 +128,16 @@ object ReverseFlowAnalyzer {
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case _ =>
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}
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currentImportance = result
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case AssemblyLine(JSR, _, _, _) =>
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case AssemblyLine(JSR | BRK, _, _, _) =>
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currentImportance = finalImportance
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case AssemblyLine(JMP, Absolute, MemoryAddressConstant(Label(l)), _) =>
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case AssemblyLine(JMP | BRA, Absolute | Relative, MemoryAddressConstant(Label(l)), _) =>
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val L = l
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val labelIndex = codeArray.indexWhere {
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case AssemblyLine(LABEL, _, MemoryAddressConstant(Label(L)), _) => true
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case _ => false
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}
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currentImportance = if (labelIndex < 0) finalImportance else importanceArray(labelIndex)
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case AssemblyLine(JMP, Indirect, _, _) =>
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case AssemblyLine(JMP, Indirect | AbsoluteIndexedX, _, _) =>
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currentImportance = finalImportance
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case AssemblyLine(BNE | BEQ, _, _, _) =>
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currentImportance = currentImportance.copy(z = Important)
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@ -136,7 +145,7 @@ object ReverseFlowAnalyzer {
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currentImportance = currentImportance.copy(n = Important)
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case AssemblyLine(SED | CLD, _, _, _) =>
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currentImportance = currentImportance.copy(d = Unimportant)
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case AssemblyLine(RTS, _, _, _) =>
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case AssemblyLine(RTS | RTI, _, _, _) =>
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currentImportance = finalImportance
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case AssemblyLine(DISCARD_XF, _, _, _) =>
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currentImportance = currentImportance.copy(x = Unimportant, n = Unimportant, z = Unimportant, c = Unimportant, v = Unimportant)
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@ -158,8 +167,10 @@ object ReverseFlowAnalyzer {
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if (OpcodeClasses.ReadsYAlways(opcode)) currentImportance = currentImportance.copy(y = Important)
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if (OpcodeClasses.ReadsAAlways(opcode)) currentImportance = currentImportance.copy(a = Important)
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if (OpcodeClasses.ReadsAIfImplied(opcode) && addrMode == Implied) currentImportance = currentImportance.copy(a = Important)
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if (addrMode == AbsoluteX || addrMode == IndexedX || addrMode == ZeroPageX) currentImportance = currentImportance.copy(x = Important)
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if (addrMode == AbsoluteY || addrMode == IndexedY || addrMode == ZeroPageY) currentImportance = currentImportance.copy(y = Important)
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if (addrMode == AbsoluteX || addrMode == IndexedX || addrMode == ZeroPageX || addrMode == AbsoluteIndexedX)
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currentImportance = currentImportance.copy(x = Important)
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if (addrMode == AbsoluteY || addrMode == IndexedY || addrMode == ZeroPageY)
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currentImportance = currentImportance.copy(y = Important)
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}
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}
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}
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@ -72,6 +72,8 @@ class RuleBasedAssemblyOptimization(val name: String, val needsFlowInfo: FlowInf
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class AssemblyMatchingContext {
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private val map = mutable.Map[Int, Any]()
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override def toString: String = map.mkString(", ")
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def addObject(i: Int, o: Any): Boolean = {
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if (map.contains(i)) {
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map(i) == o
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@ -81,6 +83,16 @@ class AssemblyMatchingContext {
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}
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}
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def addAddrModeLoosely(i: Int, o: AddrMode.Value): Boolean = {
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if (map.contains(i)) {
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val a = map(i).asInstanceOf[AddrMode.Value]
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a == o || a == AddrMode.ZeroPage && o == AddrMode.Absolute || a == AddrMode.Absolute && o == AddrMode.ZeroPage
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} else {
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map(i) = o
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true
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}
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}
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def dontMatch(i: Int, o: Any): Boolean = {
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if (map.contains(i)) {
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map(i) != o
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@ -134,44 +146,6 @@ class AssemblyMatchingContext {
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jumps.isEmpty
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}
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def areMemoryReferencesProvablyNonOverlapping(param1: Int, addrMode1: Int, param2: Int, addrMode2: Int): Boolean = {
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val p1 = get[Constant](param1).quickSimplify
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val a1 = get[AddrMode.Value](addrMode1)
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val p2 = get[Constant](param2).quickSimplify
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val a2 = get[AddrMode.Value](addrMode2)
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import AddrMode._
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val badAddrModes = Set(IndexedX, IndexedY, ZeroPageIndirect, AbsoluteIndexedX)
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if (badAddrModes(a1) || badAddrModes(a2)) return false
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def handleKnownDistance(distance: Short): Boolean = {
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val indexingAddrModes = Set(AbsoluteIndexedX, AbsoluteX, ZeroPageX, AbsoluteY, ZeroPageY)
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val a1Indexing = indexingAddrModes(a1)
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val a2Indexing = indexingAddrModes(a2)
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(a1Indexing, a2Indexing) match {
|
||||
case (false, false) => distance != 0
|
||||
case (true, false) => distance > 255 || distance < 0
|
||||
case (false, true) => distance > 0 || distance < -255
|
||||
case (true, true) => distance > 255 || distance < -255
|
||||
}
|
||||
}
|
||||
|
||||
(p1, p2) match {
|
||||
case (NumericConstant(n1, _), NumericConstant(n2, _)) =>
|
||||
handleKnownDistance((n2 - n1).toShort)
|
||||
case (a, CompoundConstant(MathOperator.Plus, b, NumericConstant(distance, _))) if a.quickSimplify == b.quickSimplify =>
|
||||
handleKnownDistance(distance.toShort)
|
||||
case (CompoundConstant(MathOperator.Plus, a, NumericConstant(distance, _)), b) if a.quickSimplify == b.quickSimplify =>
|
||||
handleKnownDistance((-distance).toShort)
|
||||
case (a, CompoundConstant(MathOperator.Minus, b, NumericConstant(distance, _))) if a.quickSimplify == b.quickSimplify =>
|
||||
handleKnownDistance((-distance).toShort)
|
||||
case (CompoundConstant(MathOperator.Minus, a, NumericConstant(distance, _)), b) if a.quickSimplify == b.quickSimplify =>
|
||||
handleKnownDistance(distance.toShort)
|
||||
case (MemoryAddressConstant(MemoryVariable(a, _, _)), MemoryAddressConstant(MemoryVariable(b, _, _))) =>
|
||||
a.takeWhile(_ != '.') != a.takeWhile(_ != '.') // TODO: ???
|
||||
case _ =>
|
||||
false
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
case class AssemblyRule(pattern: AssemblyPattern, result: (List[AssemblyLine], AssemblyMatchingContext) => List[AssemblyLine]) {
|
||||
|
|
@ -236,15 +210,37 @@ trait AssemblyPattern {
|
|||
true // TODO: ???
|
||||
case (MemoryAddressConstant(a: ThingInMemory), MemoryAddressConstant(b: ThingInMemory)) =>
|
||||
a.name.takeWhile(_ != '.') != b.name.takeWhile(_ != '.') // TODO: ???
|
||||
case (CompoundConstant(MathOperator.Plus | MathOperator.Minus, MemoryAddressConstant(a: ThingInMemory), NumericConstant(_, _)),
|
||||
case (CompoundConstant(op@(MathOperator.Plus | MathOperator.Minus), MemoryAddressConstant(a: ThingInMemory), NumericConstant(offset, _)),
|
||||
MemoryAddressConstant(b: ThingInMemory)) =>
|
||||
a.name.takeWhile(_ != '.') != b.name.takeWhile(_ != '.') // TODO: ???
|
||||
if (a.name == b.name) {
|
||||
if (op == MathOperator.Plus) {
|
||||
handleKnownDistance((-offset).toShort)
|
||||
} else {
|
||||
handleKnownDistance(offset.toShort)
|
||||
}
|
||||
} else {
|
||||
a.name.takeWhile(_ != '.') != b.name.takeWhile(_ != '.') // TODO: ???
|
||||
}
|
||||
case (MemoryAddressConstant(a: ThingInMemory),
|
||||
CompoundConstant(MathOperator.Plus | MathOperator.Minus, MemoryAddressConstant(b: ThingInMemory), NumericConstant(_, _))) =>
|
||||
a.name.takeWhile(_ != '.') != b.name.takeWhile(_ != '.') // TODO: ???
|
||||
case (CompoundConstant(MathOperator.Plus | MathOperator.Minus, MemoryAddressConstant(a: ThingInMemory), NumericConstant(_, _)),
|
||||
CompoundConstant(MathOperator.Plus | MathOperator.Minus, MemoryAddressConstant(b: ThingInMemory), NumericConstant(_, _))) =>
|
||||
a.name.takeWhile(_ != '.') != b.name.takeWhile(_ != '.') // TODO: ???
|
||||
CompoundConstant(op@(MathOperator.Plus | MathOperator.Minus), MemoryAddressConstant(b: ThingInMemory), NumericConstant(offset, _))) =>
|
||||
if (a.name == b.name) {
|
||||
if (op == MathOperator.Minus) {
|
||||
handleKnownDistance((-offset).toShort)
|
||||
} else {
|
||||
handleKnownDistance(offset.toShort)
|
||||
}
|
||||
} else {
|
||||
a.name.takeWhile(_ != '.') != b.name.takeWhile(_ != '.') // TODO: ???
|
||||
}
|
||||
case (CompoundConstant(op1@(MathOperator.Plus | MathOperator.Minus), MemoryAddressConstant(a: ThingInMemory), NumericConstant(o1, _)),
|
||||
CompoundConstant(op2@(MathOperator.Plus | MathOperator.Minus), MemoryAddressConstant(b: ThingInMemory), NumericConstant(o2, _))) =>
|
||||
if (a.name == b.name) {
|
||||
val offset1 = if (op1==MathOperator.Plus) o1 else -o1
|
||||
val offset2 = if (op2==MathOperator.Plus) o2 else -o2
|
||||
handleKnownDistance((offset2 - offset1).toShort)
|
||||
} else {
|
||||
a.name.takeWhile(_ != '.') != b.name.takeWhile(_ != '.') // TODO: ???
|
||||
}
|
||||
case _ =>
|
||||
false
|
||||
}
|
||||
|
|
@ -550,6 +546,14 @@ case object Elidable extends AssemblyLinePattern {
|
|||
line.elidable
|
||||
}
|
||||
|
||||
case object DebugMatching extends AssemblyPattern {
|
||||
override def matchTo(ctx: AssemblyMatchingContext, code: List[(FlowInfo, AssemblyLine)]): Option[List[(FlowInfo, AssemblyLine)]] = {
|
||||
println(ctx)
|
||||
code.foreach(println)
|
||||
Some(code)
|
||||
}
|
||||
}
|
||||
|
||||
case object Linear extends AssemblyLinePattern {
|
||||
override def matchLineTo(ctx: AssemblyMatchingContext, flowInfo: FlowInfo, line: AssemblyLine): Boolean =
|
||||
OpcodeClasses.AllLinear(line.opcode)
|
||||
|
|
@ -641,7 +645,7 @@ case class DoesntChangeMemoryAt(addrMode1: Int, param1: Int) extends AssemblyLin
|
|||
|
||||
case object ConcernsMemory extends TrivialAssemblyLinePattern {
|
||||
override def apply(line: AssemblyLine): Boolean =
|
||||
ReadsMemory(line) && ChangesMemory(line)
|
||||
ReadsMemory(line) || ChangesMemory(line)
|
||||
}
|
||||
|
||||
case class DoesNotConcernMemoryAt(addrMode1: Int, param1: Int) extends AssemblyLinePattern {
|
||||
|
|
@ -715,7 +719,7 @@ case class DontMatchParameter(i: Int) extends AssemblyLinePattern {
|
|||
|
||||
case class MatchAddrMode(i: Int) extends AssemblyLinePattern {
|
||||
override def matchLineTo(ctx: AssemblyMatchingContext, flowInfo: FlowInfo, line: AssemblyLine): Boolean =
|
||||
ctx.addObject(i, line.addrMode)
|
||||
ctx.addAddrModeLoosely(i, line.addrMode)
|
||||
|
||||
override def toString: String = s"¬(?<$i>AddrMode)"
|
||||
}
|
||||
|
|
|
|||
|
|
@ -1,5 +1,5 @@
|
|||
package millfork.test
|
||||
import millfork.test.emu.{EmuBenchmarkRun, EmuUnoptimizedRun}
|
||||
import millfork.test.emu.{EmuBenchmarkRun, EmuUltraBenchmarkRun, EmuUnoptimizedRun}
|
||||
import org.scalatest.{FunSuite, Matchers}
|
||||
|
||||
/**
|
||||
|
|
@ -42,7 +42,7 @@ class ShiftSuite extends FunSuite with Matchers {
|
|||
}
|
||||
|
||||
test("Long shifting left") {
|
||||
EmuBenchmarkRun("""
|
||||
EmuUltraBenchmarkRun("""
|
||||
| long output @$c000
|
||||
| void main () {
|
||||
| output = $1010301
|
||||
|
|
|
|||
Loading…
Reference in New Issue
Block a user