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6502: Fix some cases of word additions; optimize bitmasking
This commit is contained in:
Karol Stasiak
parent
40b2e393da
commit
943a56a30f
src
@ -32,6 +32,7 @@ object OptimizationPresets {
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AlwaysGoodOptimizations.IdempotentDuplicateRemoval,
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AlwaysGoodOptimizations.BranchInPlaceRemoval,
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UnusedLabelRemoval,
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AlwaysGoodOptimizations.OptimizableMasking,
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AlwaysGoodOptimizations.UnconditionalJumpRemoval,
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UnusedLabelRemoval,
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AlwaysGoodOptimizations.RearrangeMath,
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@ -212,6 +213,7 @@ object OptimizationPresets {
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AlwaysGoodOptimizations.NonetAddition,
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AlwaysGoodOptimizations.NonetBitOp,
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AlwaysGoodOptimizations.OperationsAroundShifting,
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AlwaysGoodOptimizations.OptimizableMasking,
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AlwaysGoodOptimizations.OptimizeZeroComparisons,
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AlwaysGoodOptimizations.PoinlessFlagChange,
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AlwaysGoodOptimizations.PointlessAccumulatorShifting,
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@ -2849,7 +2849,7 @@ object AlwaysGoodOptimizations {
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},
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)
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val ConstantInlinedShifting = new RuleBasedAssemblyOptimization("Constant inlined shifting",
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lazy val ConstantInlinedShifting = new RuleBasedAssemblyOptimization("Constant inlined shifting",
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needsFlowInfo = FlowInfoRequirement.BothFlows,
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// TODO: set limits on the loop iteration to avoid huge unrolled code
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@ -2874,7 +2874,7 @@ object AlwaysGoodOptimizations {
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)
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val SimplifiableComparison = new RuleBasedAssemblyOptimization("Simplifiable comparison",
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lazy val SimplifiableComparison = new RuleBasedAssemblyOptimization("Simplifiable comparison",
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needsFlowInfo = FlowInfoRequirement.BackwardFlow,
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(Elidable & HasOpcode(LDA)) ~
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@ -2909,4 +2909,147 @@ object AlwaysGoodOptimizations {
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},
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)
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private val powersOf2: List[(Int, Int)] = List(
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1 -> 0,
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2 -> 1,
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4 -> 2,
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8 -> 3,
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16 -> 4,
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32 -> 5,
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64 -> 6
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)
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lazy val OptimizableMasking = new RuleBasedAssemblyOptimization("Simplifiable masking",
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needsFlowInfo = FlowInfoRequirement.BackwardFlow,
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MultipleAssemblyRules((for{
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(sourceMask, sourceShift) <- powersOf2
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(targetMask, targetShift) <- powersOf2
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shiftOp = if (sourceShift > targetShift) LSR else ASL
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shift = if (sourceShift > targetShift) sourceShift - targetShift else targetShift - sourceShift
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if shift < 2
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} yield {
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List(
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// LDA:
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(HasOpcode(AND) & HasImmediate(sourceMask)) ~
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(Elidable & HasOpcode(BEQ) & MatchParameter(10)) ~
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(Elidable & HasOpcode(LDA) & HasImmediate(targetMask)) ~
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(Elidable & HasOpcodeIn(JMP, BNE, BRA, BPL) & MatchParameter(11)) ~
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(Elidable & HasOpcode(LABEL) & IsNotALabelUsedManyTimes & MatchParameter(10)) ~
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(Elidable & HasOpcode(LDA) & HasImmediate(0)) ~
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(Elidable & HasOpcode(LABEL) & IsNotALabelUsedManyTimes & MatchParameter(11) & DoesntMatterWhatItDoesWith(State.N, State.Z, State.C)) ~~>
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(c => c.head :: List.fill(shift)(AssemblyLine.implied(shiftOp).pos(c(2).source))),
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(HasOpcode(AND) & HasImmediate(sourceMask)) ~
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(Elidable & HasOpcode(BNE) & MatchParameter(10)) ~
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(Elidable & HasOpcode(LDA) & HasImmediate(targetMask)) ~
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(Elidable & HasOpcodeIn(JMP, BEQ, BRA, BPL) & MatchParameter(11)) ~
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(Elidable & HasOpcode(LABEL) & IsNotALabelUsedManyTimes & MatchParameter(10)) ~
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(Elidable & HasOpcode(LDA) & HasImmediate(0)) ~
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(Elidable & HasOpcode(LABEL) & IsNotALabelUsedManyTimes & MatchParameter(11) & DoesntMatterWhatItDoesWith(State.N, State.Z, State.C)) ~~>
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(c => List(c.head, AssemblyLine.immediate(EOR, sourceMask).pos(c(1).source)) ++ List.fill(shift)(AssemblyLine.implied(shiftOp).pos(c(2).source))),
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(HasOpcode(AND) & HasImmediate(sourceMask)) ~
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(Elidable & HasOpcode(BEQ) & MatchParameter(10)) ~
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(Elidable & HasOpcode(LDA) & HasImmediate(0)) ~
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(Elidable & HasOpcodeIn(JMP, BNE, BRA, BPL) & MatchParameter(11)) ~
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(Elidable & HasOpcode(LABEL) & IsNotALabelUsedManyTimes & MatchParameter(10)) ~
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(Elidable & HasOpcode(LDA) & HasImmediate(targetMask)) ~
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(Elidable & HasOpcode(LABEL) & IsNotALabelUsedManyTimes & MatchParameter(11) & DoesntMatterWhatItDoesWith(State.N, State.Z, State.C)) ~~>
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(c => List(c.head, AssemblyLine.immediate(EOR, sourceMask).pos(c(1).source)) ++ List.fill(shift)(AssemblyLine.implied(shiftOp).pos(c(2).source))),
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(HasOpcode(AND) & HasImmediate(sourceMask)) ~
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(Elidable & HasOpcode(BNE) & MatchParameter(10)) ~
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(Elidable & HasOpcode(LDA) & HasImmediate(0)) ~
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(Elidable & HasOpcodeIn(JMP, BEQ, BRA, BPL) & MatchParameter(11)) ~
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(Elidable & HasOpcode(LABEL) & IsNotALabelUsedManyTimes & MatchParameter(10)) ~
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(Elidable & HasOpcode(LDA) & HasImmediate(targetMask)) ~
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(Elidable & HasOpcode(LABEL) & IsNotALabelUsedManyTimes & MatchParameter(11) & DoesntMatterWhatItDoesWith(State.N, State.Z, State.C)) ~~>
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(c => c.head :: List.fill(shift)(AssemblyLine.implied(shiftOp).pos(c(2).source))),
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// LDY
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(HasOpcode(AND) & HasImmediate(sourceMask)) ~
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(Elidable & HasOpcode(BEQ) & MatchParameter(10)) ~
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(Elidable & HasOpcode(LDY) & HasImmediate(targetMask)) ~
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(Elidable & HasOpcodeIn(JMP, BNE, BRA, BPL) & MatchParameter(11)) ~
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(Elidable & HasOpcode(LABEL) & IsNotALabelUsedManyTimes & MatchParameter(10)) ~
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(Elidable & (HasOpcode(LDY) & HasImmediate(0) | HasOpcode(TAY))) ~
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(Elidable & HasOpcode(LABEL) & IsNotALabelUsedManyTimes & MatchParameter(11) & DoesntMatterWhatItDoesWith(State.N, State.Z, State.C, State.A)) ~~>
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(c => c.head :: List.fill(shift)(AssemblyLine.implied(shiftOp).pos(c(2).source)) ++ List(AssemblyLine.implied(TAY))),
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(HasOpcode(AND) & HasImmediate(sourceMask)) ~
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(Elidable & HasOpcode(BNE) & MatchParameter(10)) ~
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(Elidable & HasOpcode(LDY) & HasImmediate(targetMask)) ~
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(Elidable & HasOpcodeIn(JMP, BEQ, BRA, BPL) & MatchParameter(11)) ~
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(Elidable & HasOpcode(LABEL) & IsNotALabelUsedManyTimes & MatchParameter(10)) ~
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(Elidable & HasOpcode(LDY) & HasImmediate(0)) ~
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(Elidable & HasOpcode(LABEL) & IsNotALabelUsedManyTimes & MatchParameter(11) & DoesntMatterWhatItDoesWith(State.N, State.Z, State.C, State.A)) ~~>
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(c => List(c.head, AssemblyLine.immediate(EOR, sourceMask).pos(c(1).source)) ++ List.fill(shift)(AssemblyLine.implied(shiftOp).pos(c(2).source)) ++ List(AssemblyLine.implied(TAY))),
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(HasOpcode(AND) & HasImmediate(sourceMask)) ~
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(Elidable & HasOpcode(BEQ) & MatchParameter(10)) ~
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(Elidable & HasOpcode(LDY) & HasImmediate(0)) ~
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(Elidable & HasOpcodeIn(JMP, BNE, BRA, BPL) & MatchParameter(11)) ~
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(Elidable & HasOpcode(LABEL) & IsNotALabelUsedManyTimes & MatchParameter(10)) ~
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(Elidable & HasOpcode(LDY) & HasImmediate(targetMask)) ~
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(Elidable & HasOpcode(LABEL) & IsNotALabelUsedManyTimes & MatchParameter(11) & DoesntMatterWhatItDoesWith(State.N, State.Z, State.C, State.A)) ~~>
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(c => List(c.head, AssemblyLine.immediate(EOR, sourceMask).pos(c(1).source)) ++ List.fill(shift)(AssemblyLine.implied(shiftOp).pos(c(2).source)) ++ List(AssemblyLine.implied(TAY))),
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(HasOpcode(AND) & HasImmediate(sourceMask)) ~
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(Elidable & HasOpcode(BNE) & MatchParameter(10)) ~
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(Elidable & (HasOpcode(LDY) & HasImmediate(0) | HasOpcode(TAY))) ~
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(Elidable & HasOpcodeIn(JMP, BEQ, BRA, BPL) & MatchParameter(11)) ~
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(Elidable & HasOpcode(LABEL) & IsNotALabelUsedManyTimes & MatchParameter(10)) ~
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(Elidable & HasOpcode(LDY) & HasImmediate(targetMask)) ~
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(Elidable & HasOpcode(LABEL) & IsNotALabelUsedManyTimes & MatchParameter(11) & DoesntMatterWhatItDoesWith(State.N, State.Z, State.C, State.A)) ~~>
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(c => c.head :: List.fill(shift)(AssemblyLine.implied(shiftOp).pos(c(2).source)) ++ List(AssemblyLine.implied(TAY))),
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// LDX
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(HasOpcode(AND) & HasImmediate(sourceMask)) ~
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(Elidable & HasOpcode(BEQ) & MatchParameter(10)) ~
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(Elidable & HasOpcode(LDX) & HasImmediate(targetMask)) ~
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(Elidable & HasOpcodeIn(JMP, BNE, BRA, BPL) & MatchParameter(11)) ~
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(Elidable & HasOpcode(LABEL) & IsNotALabelUsedManyTimes & MatchParameter(10)) ~
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(Elidable & (HasOpcode(LDX) & HasImmediate(0) | HasOpcode(TAX))) ~
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(Elidable & HasOpcode(LABEL) & IsNotALabelUsedManyTimes & MatchParameter(11) & DoesntMatterWhatItDoesWith(State.N, State.Z, State.C, State.A)) ~~>
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(c => c.head :: List.fill(shift)(AssemblyLine.implied(shiftOp).pos(c(2).source)) ++ List(AssemblyLine.implied(TAX))),
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(HasOpcode(AND) & HasImmediate(sourceMask)) ~
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(Elidable & HasOpcode(BNE) & MatchParameter(10)) ~
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(Elidable & HasOpcode(LDX) & HasImmediate(targetMask)) ~
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(Elidable & HasOpcodeIn(JMP, BEQ, BRA, BPL) & MatchParameter(11)) ~
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(Elidable & HasOpcode(LABEL) & IsNotALabelUsedManyTimes & MatchParameter(10)) ~
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(Elidable & HasOpcode(LDX) & HasImmediate(0)) ~
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(Elidable & HasOpcode(LABEL) & IsNotALabelUsedManyTimes & MatchParameter(11) & DoesntMatterWhatItDoesWith(State.N, State.Z, State.C, State.A)) ~~>
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(c => List(c.head, AssemblyLine.immediate(EOR, sourceMask).pos(c(1).source)) ++ List.fill(shift)(AssemblyLine.implied(shiftOp).pos(c(2).source)) ++ List(AssemblyLine.implied(TAX))),
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(HasOpcode(AND) & HasImmediate(sourceMask)) ~
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(Elidable & HasOpcode(BEQ) & MatchParameter(10)) ~
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(Elidable & HasOpcode(LDX) & HasImmediate(0)) ~
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(Elidable & HasOpcodeIn(JMP, BNE, BRA, BPL) & MatchParameter(11)) ~
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(Elidable & HasOpcode(LABEL) & IsNotALabelUsedManyTimes & MatchParameter(10)) ~
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(Elidable & HasOpcode(LDX) & HasImmediate(targetMask)) ~
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(Elidable & HasOpcode(LABEL) & IsNotALabelUsedManyTimes & MatchParameter(11) & DoesntMatterWhatItDoesWith(State.N, State.Z, State.C, State.A)) ~~>
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(c => List(c.head, AssemblyLine.immediate(EOR, sourceMask).pos(c(1).source)) ++ List.fill(shift)(AssemblyLine.implied(shiftOp).pos(c(2).source)) ++ List(AssemblyLine.implied(TAX))),
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(HasOpcode(AND) & HasImmediate(sourceMask)) ~
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(Elidable & HasOpcode(BNE) & MatchParameter(10)) ~
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(Elidable & (HasOpcode(LDX) & HasImmediate(0) | HasOpcode(TAX))) ~
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(Elidable & HasOpcodeIn(JMP, BEQ, BRA, BPL) & MatchParameter(11)) ~
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(Elidable & HasOpcode(LABEL) & IsNotALabelUsedManyTimes & MatchParameter(10)) ~
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(Elidable & HasOpcode(LDX) & HasImmediate(targetMask)) ~
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(Elidable & HasOpcode(LABEL) & IsNotALabelUsedManyTimes & MatchParameter(11) & DoesntMatterWhatItDoesWith(State.N, State.Z, State.C, State.A)) ~~>
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(c => c.head :: List.fill(shift)(AssemblyLine.implied(shiftOp).pos(c(2).source)) ++ List(AssemblyLine.implied(TAX)))
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)
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}).flatten)
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)
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}
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@ -80,6 +80,8 @@ object PseudoregisterBuiltIns {
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niceReads.prepend(List(AssemblyLine.immediate(LDA, constant.loByte)) -> List(AssemblyLine.immediate(LDA, constant.hiByte)))
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}
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}
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if (doesMemoryAccessOverlap(niceReads.flatMap(_._1).toList, stores(1))) return None
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if (doesMemoryAccessOverlap(niceReads.flatMap(_._2).toList, stores(0))) return None
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for (b <- 0 to 1) {
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for (read <- niceReads) {
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if (b == 0) result ++= read._1
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@ -122,11 +124,15 @@ object PseudoregisterBuiltIns {
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return List(AssemblyLine.immediate(LDA, 0), AssemblyLine.immediate(LDX, 0))
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}
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val reg = ctx.env.get[VariableInMemory]("__reg.loword")
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val head = params.head match {
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val addToRegs = params.map{ case (sub, param) => addToReg(ctx, param, sub, decimal) }
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val newHead = params.indices.find{ i =>
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!params(i)._1 && addToRegs(i).exists(l => l.opcode == PHA || l.opcode == PHA_W)
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}.getOrElse(0)
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val head = params(newHead) match {
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case (false, e) => MosExpressionCompiler.compile(ctx, e, Some(MosExpressionCompiler.getExpressionType(ctx, e) -> reg), BranchSpec.None)
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case (true, e) => ???
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}
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params.tail.foldLeft[List[AssemblyLine]](head){case (code, (sub, param)) => code ++ addToReg(ctx, param, sub, decimal)} ++ List(
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params.indices.filter(_ != newHead).foldLeft[List[AssemblyLine]](head){case (code, index) => code ++ addToRegs(index)} ++ List(
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AssemblyLine.zeropage(LDA, reg),
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AssemblyLine.zeropage(LDX, reg, 1),
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)
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@ -152,11 +158,15 @@ object PseudoregisterBuiltIns {
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return List(AssemblyLine.accu16, AssemblyLine.immediate(LDA_W, 0), AssemblyLine.accu8)
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}
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val reg = ctx.env.get[VariableInMemory]("__reg.loword")
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val head = params.head match {
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val addToRegs = params.map{ case (sub, param) => addToReg(ctx, param, sub, decimal) }
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val newHead = params.indices.find{ i =>
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!params(i)._1 && addToRegs(i).exists(l => l.opcode == PHA || l.opcode == PHA_W)
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}.getOrElse(0)
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val head = params(newHead) match {
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case (false, e) => MosExpressionCompiler.compile(ctx, e, Some(MosExpressionCompiler.getExpressionType(ctx, e) -> reg), BranchSpec.None)
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case (true, e) => ???
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}
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params.tail.foldLeft[List[AssemblyLine]](head){case (code, (sub, param)) => code ++ addToReg(ctx, param, sub, decimal)} ++ List(
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params.indices.filter(_ != newHead).foldLeft[List[AssemblyLine]](head){case (code, index) => code ++ addToRegs(index)} ++ List(
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AssemblyLine.accu16,
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AssemblyLine.zeropage(LDA_W, reg),
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AssemblyLine.accu8
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@ -238,8 +248,7 @@ object PseudoregisterBuiltIns {
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AssemblyLine.zeropage(STA, reg),
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AssemblyLine.zeropage(LDA, reg, 1),
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h.copy(opcode = op),
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AssemblyLine.zeropage(STA, reg, 1),
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AssemblyLine.zeropage(LDA, reg)))
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AssemblyLine.zeropage(STA, reg, 1)))
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case List(
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AssemblyLine0(REP, Immediate, NumericConstant(0x20, _)),
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l@AssemblyLine0(LDA_W, addrMode, _),
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@ -675,4 +684,18 @@ object PseudoregisterBuiltIns {
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case AssemblyLine0(_, _, CompoundConstant(MathOperator.Plus, MemoryAddressConstant(th), NumericConstant(2, _))) if th.name == "__reg" => true
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case _ => false
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}
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def doesMemoryAccessOverlap(l1: List[AssemblyLine], l2: List[AssemblyLine]): Boolean = {
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print()
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for{
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a1 <- l1
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if a1.addrMode != Immediate && a1.addrMode != Implied
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a2 <- l2
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if a2.addrMode != Immediate && a2.addrMode != Implied
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if (a1.opcode == STA) != (a2.opcode == STA)
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} {
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if (a1.parameter == a2.parameter) return true
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}
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false
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}
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}
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@ -72,4 +72,21 @@ class BitOpSuite extends FunSuite with Matchers {
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| noinline void barrier(){}
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""".stripMargin)(_.readWord(0xc000) should equal(0xc00c))
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}
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test("Bit testing optimizations") {
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val code ="""
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| byte output @$c000
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| noinline byte f() = 5
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| noinline bool g(byte x) = x & 1 == 0
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| void main () {
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| byte x
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| x = f()
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|
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| if x & 4 == 0 { x = 0 } else { x = 2 }
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| output = x
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| }
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|
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""".stripMargin
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EmuCrossPlatformBenchmarkRun(Cpu.Mos, Cpu.Z80)(code)(_.readByte(0xc000) should equal(2))
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}
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}
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@ -138,4 +138,21 @@ class BooleanSuite extends FunSuite with Matchers {
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""".stripMargin
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EmuCrossPlatformBenchmarkRun(Cpu.Mos, Cpu.Z80)(code)(_.readByte(0xc000) should equal(code.sliding(4).count(_ == "pass")))
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}
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test("Fat boolean optimization") {
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val code ="""
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| byte output @$c000
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| noinline bool f(byte x) = x & 1 != 0
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| noinline bool g(byte x) = x & 1 == 0
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| void main () {
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| output = 5
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| if f(3) { output += 1 }
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| if g(2) { output += 1 }
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| if f(2) { output += 100 }
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| if g(3) { output += 100 }
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| }
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|
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""".stripMargin
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EmuCrossPlatformBenchmarkRun(Cpu.Mos, Cpu.Z80)(code)(_.readByte(0xc000) should equal(7))
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}
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}
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@ -236,6 +236,23 @@ class WordMathSuite extends FunSuite with Matchers with AppendedClues {
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}
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}
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test("Word addition 5") {
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EmuCrossPlatformBenchmarkRun(Cpu.Mos, Cpu.Sixteen, Cpu.Z80, Cpu.Intel8080, Cpu.Sharp, Cpu.Intel8086)("""
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| word output @$c000
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| void main () {
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| word v
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| word u
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| v = $308
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| output = $102
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| barrier()
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| output = (output.lo:output.hi) + v
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| }
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| noinline void barrier() { }
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""".stripMargin){ m =>
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m.readWord(0xc000) should equal(0x509)
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}
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}
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test("Word bit ops 2") {
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EmuCrossPlatformBenchmarkRun(Cpu.Sixteen, Cpu.Mos, Cpu.Z80, Cpu.Intel8080, Cpu.Sharp, Cpu.Intel8086)("""
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| word output @$c000
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