Z80: Intel syntax for output.

docs/api/command-line.md

@@ -26,6 +26,10 @@ no extension for BBC micro program file,
 
 * `-s` – Generate also the assembly output. It is not compatible with any assembler, but it serves purely informational purpose. The file has the same nam as the output file and the extension is `.asm`.
 
+* `-foutput_intel_syntax`, `-foutput_zilog_syntax` –
+Choose syntax for assembly output on 8080-like targets.
+`.ini` equivalent: `output_intel_syntax`. Default: Intel (true) on Intel 8080, Zilog (false) otherwise.
+
 * `-g` – Generate also the label file. The label file contains labels with their addresses, with duplicates removed. It can be loaded into the monitor of the Vice emulator for debugging purposes. The file has the same name as the output file and the extension is `.lbl`.
 
 * `-I  <dir>;<dir>` – The include directories. The current working directory is also an include directory. Those directories are searched for modules and platform definitions.

docs/api/custom-platform.md

@@ -77,6 +77,8 @@ Default: the same as `encoding`.
     * `ix_scratch` – allow using the IY register for other purposes, default is `false`
     
     * `iy_scratch` – allow using the IY register for other purposes, default is `false`
+    
+    * `output_intel_syntax` – use Intel syntax instead of Zilog syntax, default is `true` for Intel 8080 and `false` otherwise
 
 
 #### `[define]` section

docs/api/getting-started.md

@@ -48,6 +48,7 @@ You may be also interested in the following:
 * `-fipo` – enable interprocedural optimization
 
 * `-s` – additionally generate assembly output
+(if targeting Intel 8080, use `-foutput_intel_syntax` or `-foutput_zilog_syntax` to choose the preferred output syntax)
 
 * `-g` – additionally generate a label file, in format compatible with VICE emulator
 

docs/lang/assemblyz80.md

@@ -10,7 +10,11 @@ There are two ways to include raw assembly code in your Millfork programs:
 
 ## Assembly syntax
 
-Millfork uses Zilog syntax for Intel 8080, Z80 and LR35902 assembly. Intel syntax is not supported.
+Millfork uses Zilog syntax for Intel 8080, Z80 and LR35902 assembly.  
+
+**Work in progress**:
+Intel syntax is not supported yet.
+LR35902 instructions for faster access to the $FFxx addresses are not available yet.
 
 Indexing via the IX/IY register uses the following syntax: `IX(1)` 
 
@@ -20,8 +24,6 @@ LR35902 instructions that load/store the accumulator indirectly via HL and then
 Only instructions available on the current CPU architecture are available.
 Undocumented instructions are not supported, except for `SLL`.
 
-LR35902 instructions for faster access to the $FFxx addresses are not available yet.
-
 Labels have to be followed by a colon and they can optionally be on a separate line.
 Indentation is not important: