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https://github.com/KarolS/millfork.git
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6809: Implement more things
This commit is contained in:
Karol Stasiak
parent
6cd639a23a
commit
f39fd67a89
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@ -32,6 +32,10 @@ object MLine {
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def longBranch(opcode: MOpcode.Value, label: String): MLine = longBranch(opcode, Label(label))
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def shortBranch(opcode: MOpcode.Value, label: Label): MLine = MLine(opcode, Relative, label.toAddress)
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def shortBranch(opcode: MOpcode.Value, label: String): MLine = shortBranch(opcode, Label(label))
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def tfr(source: M6809Register.Value, target: M6809Register.Value): MLine = MLine(TFR, TwoRegisters(source, target), Constant.Zero)
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def pp(opcode: MOpcode.Value, registers: M6809Register.Value*): MLine = MLine(opcode, RegisterSet(registers.toSet), Constant.Zero)
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@ -42,6 +46,9 @@ object MLine {
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def indexedX(opcode: MOpcode.Value, offset: Constant): MLine =
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MLine(opcode, Indexed(M6809Register.X, indirect = false), offset)
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def indexedX(opcode: MOpcode.Value, offset: Int): MLine =
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MLine(opcode, Indexed(M6809Register.X, indirect = false), Constant(offset))
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def accessAndPullS(opcode: MOpcode.Value): MLine =
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MLine(opcode, PostIncremented(M6809Register.S, 1, indirect = false), Constant.Zero)
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@ -74,9 +81,10 @@ object MLine {
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variable match {
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case v: VariableInMemory => MLine.absolute(opcode, v.toAddress)
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case v: StackVariable =>
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if (ctx.options.flag(CompilationFlag.UseUForStack)) MLine(opcode, Indexed(M6809Register.U, indirect = false), NumericConstant(v.baseOffset, 1))
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else if (ctx.options.flag(CompilationFlag.UseYForStack)) MLine(opcode, Indexed(M6809Register.Y, indirect = false), NumericConstant(v.baseOffset, 1))
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else MLine(opcode, Indexed(M6809Register.S, indirect = false), NumericConstant(v.baseOffset + ctx.extraStackOffset, 1))
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val size = variable.typ.size
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if (ctx.options.flag(CompilationFlag.UseUForStack)) MLine(opcode, Indexed(M6809Register.U, indirect = false), NumericConstant(v.baseOffset, size))
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else if (ctx.options.flag(CompilationFlag.UseYForStack)) MLine(opcode, Indexed(M6809Register.Y, indirect = false), NumericConstant(v.baseOffset, size))
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else MLine(opcode, Indexed(M6809Register.S, indirect = false), NumericConstant(v.baseOffset + ctx.extraStackOffset, size))
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case _ => ???
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}
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}
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@ -54,6 +54,28 @@ object M6809Buitins {
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}
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}
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def perform16BitInPlace(ctx: CompilationContext, l: LhsExpression, r: Expression, opcodeA: MOpcode.Value, opcodeB: MOpcode.Value, commutative: Boolean): List[MLine] = {
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val lc = M6809ExpressionCompiler.compileToD(ctx, l)
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val rc = M6809ExpressionCompiler.compileToD(ctx, r)
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(lc, rc) match {
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case (List(ldl@MLine0(LDD, Absolute(false), _)), _) =>
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rc ++ List(ldl.copy(opcode = opcodeA), ldl.copy(opcode = opcodeB, parameter = ldl.parameter + 1), ldl.copy(opcode = STD))
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case (_, List(ldr@MLine0(LDD, Absolute(false), _))) if lc.last.opcode == LDD =>
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lc ++ List(ldr.copy(opcode = opcodeA), ldr.copy(opcode = opcodeB, parameter = ldr.parameter + 1), lc.last.copy(opcode = STD))
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case (_, List(ldr@MLine0(LDD, Immediate, _))) if lc.last.opcode == LDD =>
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lc ++ List(ldr.copy(opcode = opcodeA, parameter = ldr.parameter.hiByte), ldr.copy(opcode = opcodeB, parameter = ldr.parameter.loByte), lc.last.copy(opcode = STD))
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case _ if lc.last.opcode == LDD && commutative =>
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// TODO: preserve X?
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lc ++ List(MLine.pp(PSHS, M6809Register.D)) ++ rc ++ List(MLine.accessAndPullS(opcodeA), MLine.accessAndPullS(opcodeB), lc.last.copy(opcode = STD))
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case _ if lc.last.opcode == LDD =>
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// TODO: preserve X?
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rc ++ List(MLine.pp(PSHS, M6809Register.D)) ++ lc ++ List(MLine.accessAndPullS(opcodeA), MLine.accessAndPullS(opcodeB), lc.last.copy(opcode = STD))
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case _ =>
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println(lc)
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???
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}
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}
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def split(ctx: CompilationContext, expr: SumExpression): (Constant, List[(Boolean, Expression)]) = {
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var constant = Constant.Zero
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@ -283,7 +305,18 @@ object M6809Buitins {
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ctx.env.eval(rhs) match {
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case Some(NumericConstant(0, _)) => Nil
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case Some(NumericConstant(n, _)) => List.fill(n.toInt)(MLine.inherentB(op))
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case _ => ???
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case _ =>
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val loop = ctx.nextLabel("sr")
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val skip = ctx.nextLabel("ss")
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M6809ExpressionCompiler.stashBIfNeeded(ctx, M6809ExpressionCompiler.compileToX(ctx, rhs)) ++ List(
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MLine.label(loop),
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MLine.indexedX(LEAX, -1),
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MLine.immediate(CMPX, -1),
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MLine.shortBranch(BEQ, skip),
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MLine.inherentB(op),
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MLine.shortBranch(BRA, loop),
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MLine.label(skip)
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)
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}
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}
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@ -291,8 +324,21 @@ object M6809Buitins {
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val op = if (left) List(MLine.inherentB(ASL), MLine.inherentA(ROL)) else List(MLine.inherentA(LSR), MLine.inherentB(ROR))
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ctx.env.eval(rhs) match {
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case Some(NumericConstant(0, _)) => Nil
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case Some(NumericConstant(8, _)) =>
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if (left) List(MLine.tfr(M6809Register.B, M6809Register.A), MLine.immediate(LDB, 0))
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else List(MLine.tfr(M6809Register.A, M6809Register.B), MLine.immediate(LDA, 0))
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case Some(NumericConstant(n, _)) => List.fill(n.toInt)(op).flatten
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case _ => ???
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case _ =>
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val loop = ctx.nextLabel("sr")
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val skip = ctx.nextLabel("ss")
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M6809ExpressionCompiler.stashDIfNeeded(ctx, M6809ExpressionCompiler.compileToX(ctx, rhs)) ++ List(
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MLine.label(loop),
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MLine.indexedX(LEAX, -1),
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MLine.immediate(CMPX, -1),
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MLine.shortBranch(BEQ, skip))++op++List(
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MLine.shortBranch(BRA, loop),
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MLine.label(skip)
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)
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}
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}
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@ -11,7 +11,7 @@ import millfork.assembly.m6809.MOpcode._
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object M6809Comparisons {
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def isTrivial(lc: List[MLine]): Boolean = lc match {
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case List(MLine0(LDB, _, _)) => true
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case List(MLine0(LDB | LDD, _, _)) => true
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case _ => false
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}
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@ -25,7 +25,7 @@ object M6809Comparisons {
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case ComparisonType.GreaterOrEqualUnsigned => BCC
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case ComparisonType.LessUnsigned => BCS
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case ComparisonType.GreaterUnsigned => BHI
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case ComparisonType.LessOrEqualSigned => BLS
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case ComparisonType.LessOrEqualUnsigned => BLS
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case ComparisonType.GreaterSigned => BGT
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case ComparisonType.GreaterOrEqualSigned => BGE
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case ComparisonType.LessSigned => BLT
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@ -45,4 +45,34 @@ object M6809Comparisons {
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}
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}
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def compile16BitComparison(ctx: CompilationContext, comparisonType: ComparisonType.Value, l: Expression, r: Expression, branches: BranchSpec): scala.List[MLine] = {
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val jump = branches match {
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case BranchIfFalse(label) => return compile16BitComparison(ctx, ComparisonType.negate(comparisonType), l, r, branches.flip)
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case BranchIfTrue(label) => List(MLine.longBranch(
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comparisonType match {
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case ComparisonType.Equal => BEQ
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case ComparisonType.NotEqual => BNE
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case ComparisonType.GreaterOrEqualUnsigned => BCC
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case ComparisonType.LessUnsigned => BCS
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case ComparisonType.GreaterUnsigned => BHI
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case ComparisonType.LessOrEqualUnsigned => BLS
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case ComparisonType.GreaterSigned => BGT
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case ComparisonType.GreaterOrEqualSigned => BGE
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case ComparisonType.LessSigned => BLT
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case ComparisonType.LessOrEqualSigned => BLE
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},
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label
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))
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case _ => Nil
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}
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val lc = M6809ExpressionCompiler.compileToD(ctx, l)
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val rc = M6809ExpressionCompiler.compileToD(ctx, r)
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if (isTrivial(lc) && !isTrivial(rc)) return compile16BitComparison(ctx, ComparisonType.flip(comparisonType), r, l, branches)
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if (isTrivial(rc)) {
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lc ++ rc.map(_.copy(opcode = CMPD)) ++ jump
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} else {
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rc ++ List(MLine.pp(PSHS, M6809Register.D)) ++ lc ++ List(MLine.accessAndPullSTwice(CMPD)) ++ jump
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}
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}
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}
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@ -1,6 +1,6 @@
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package millfork.compiler.m6809
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import millfork.assembly.m6809.{DAccumulatorIndexed, Indexed, MLine, MOpcode, TwoRegisters}
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import millfork.assembly.m6809.{DAccumulatorIndexed, Immediate, Indexed, MLine, MLine0, MOpcode, TwoRegisters}
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import millfork.compiler.{AbstractExpressionCompiler, BranchIfFalse, BranchIfTrue, BranchSpec, ComparisonType, CompilationContext, NoBranching}
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import millfork.node.{DerefExpression, Expression, FunctionCallExpression, GeneratedConstantExpression, IndexedExpression, LhsExpression, LiteralExpression, M6809Register, SumExpression, VariableExpression}
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import millfork.assembly.m6809.MOpcode._
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@ -252,7 +252,7 @@ object M6809ExpressionCompiler extends AbstractExpressionCompiler[MLine] {
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compileTransitiveRelation(ctx, "==", params, target, branches) { (l, r) =>
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size match {
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case 1 => M6809Comparisons.compile8BitComparison(ctx, ComparisonType.Equal, l, r, branches)
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case 2 => ctx.log.error("Word equality comparison not implemented yet", fce.position); Nil
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case 2 => M6809Comparisons.compile16BitComparison(ctx, ComparisonType.Equal, l, r, branches)
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case _ => ???
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}
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}
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@ -261,7 +261,7 @@ object M6809ExpressionCompiler extends AbstractExpressionCompiler[MLine] {
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compileTransitiveRelation(ctx, "!=", params, target, branches) { (l, r) =>
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size match {
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case 1 => M6809Comparisons.compile8BitComparison(ctx, ComparisonType.NotEqual, l, r, branches)
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case 2 => ctx.log.error("Word inequality comparison not implemented yet", fce.position); Nil
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case 2 => M6809Comparisons.compile16BitComparison(ctx, ComparisonType.NotEqual, l, r, branches)
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case _ => ???
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}
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}
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@ -270,6 +270,7 @@ object M6809ExpressionCompiler extends AbstractExpressionCompiler[MLine] {
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compileTransitiveRelation(ctx, "<", params, target, branches) { (l, r) =>
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size match {
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case 1 => M6809Comparisons.compile8BitComparison(ctx, if (signed) ComparisonType.LessSigned else ComparisonType.LessUnsigned, l, r, branches)
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case 2 => M6809Comparisons.compile16BitComparison(ctx, if (signed) ComparisonType.LessSigned else ComparisonType.LessUnsigned, l, r, branches)
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case _ => ???
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}
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}
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@ -278,6 +279,7 @@ object M6809ExpressionCompiler extends AbstractExpressionCompiler[MLine] {
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compileTransitiveRelation(ctx, ">", params, target, branches) { (l, r) =>
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size match {
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case 1 => M6809Comparisons.compile8BitComparison(ctx, if (signed) ComparisonType.GreaterSigned else ComparisonType.GreaterUnsigned, l, r, branches)
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case 2 => M6809Comparisons.compile16BitComparison(ctx, if (signed) ComparisonType.GreaterSigned else ComparisonType.GreaterUnsigned, l, r, branches)
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case _ => ???
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}
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}
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@ -286,6 +288,7 @@ object M6809ExpressionCompiler extends AbstractExpressionCompiler[MLine] {
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compileTransitiveRelation(ctx, "<=", params, target, branches) { (l, r) =>
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size match {
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case 1 => M6809Comparisons.compile8BitComparison(ctx, if (signed) ComparisonType.LessOrEqualSigned else ComparisonType.LessOrEqualUnsigned, l, r, branches)
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case 2 => M6809Comparisons.compile16BitComparison(ctx, if (signed) ComparisonType.LessOrEqualSigned else ComparisonType.LessOrEqualUnsigned, l, r, branches)
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case _ => ???
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}
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}
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@ -294,6 +297,7 @@ object M6809ExpressionCompiler extends AbstractExpressionCompiler[MLine] {
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compileTransitiveRelation(ctx, ">=", params, target, branches) { (l, r) =>
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size match {
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case 1 => M6809Comparisons.compile8BitComparison(ctx, if (signed) ComparisonType.GreaterOrEqualSigned else ComparisonType.GreaterOrEqualUnsigned, l, r, branches)
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case 2 => M6809Comparisons.compile16BitComparison(ctx, if (signed) ComparisonType.GreaterOrEqualSigned else ComparisonType.GreaterOrEqualUnsigned, l, r, branches)
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case _ => ???
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}
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}
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@ -302,13 +306,13 @@ object M6809ExpressionCompiler extends AbstractExpressionCompiler[MLine] {
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case 1 => compileToB(ctx, params(0)) ++ M6809Buitins.compileByteShiftForB(ctx, params(1), left = true) ++ targetifyB(ctx, target, isSigned = false)
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case 2 => compileToD(ctx, params(0)) ++ M6809Buitins.compileWordShiftForD(ctx, params(1), left = true) ++ targetifyD(ctx, target)
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}
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case ">>" => ???
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case ">>" =>
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getArithmeticParamMaxSize(ctx, params) match {
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case 1 => compileToB(ctx, params(0)) ++ M6809Buitins.compileByteShiftForB(ctx, params(1), left = false) ++ targetifyB(ctx, target, isSigned = false)
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case 2 => compileToD(ctx, params(0)) ++ M6809Buitins.compileWordShiftForD(ctx, params(1), left = false) ++ targetifyD(ctx, target)
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}
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case ">>>>" =>
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// TODO: this words, but is really suboptimal
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// TODO: this works, but is really suboptimal
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getArithmeticParamMaxSize(ctx, params) match {
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case 1 | 2 => compileToD(ctx, params(0)) ++
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List(MLine.immediate(ANDA, 1)) ++
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@ -341,46 +345,39 @@ object M6809ExpressionCompiler extends AbstractExpressionCompiler[MLine] {
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val (l, r, size) = assertArithmeticAssignmentLike(ctx, params)
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size match {
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case 1 => M6809Buitins.perform8BitInPlace(ctx, l, r, ANDB)
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case 2 => M6809Buitins.perform16BitInPlace(ctx, l, r, ANDB, commutative = true)
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case _ => ???
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}
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case "|=" =>
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val (l, r, size) = assertArithmeticAssignmentLike(ctx, params)
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size match {
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case 1 => M6809Buitins.perform8BitInPlace(ctx, l, r, ORB)
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case 2 => M6809Buitins.perform16BitInPlace(ctx, l, r, ORB, commutative = true)
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case _ => ???
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}
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case "^=" =>
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val (l, r, size) = assertArithmeticAssignmentLike(ctx, params)
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size match {
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case 1 => M6809Buitins.perform8BitInPlace(ctx, l, r, EORB)
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case 2 => M6809Buitins.perform16BitInPlace(ctx, l, r, EORB, commutative = true)
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case _ => ???
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}
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case "<<=" =>
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val (l, r, size) = assertArithmeticAssignmentLike(ctx, params)
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// TODO: optimize shifts directly in memory
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size match {
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case 1 => compileAddressToX(ctx, l) ++
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List(MLine.indexedX(LDB, Constant.Zero)) ++
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M6809Buitins.compileByteShiftForB(ctx, r, left = true) ++
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List(MLine.indexedX(STB, Constant.Zero))
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case 2 => compileAddressToX(ctx, l) ++
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List(MLine.indexedX(LDD, Constant.Zero)) ++
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M6809Buitins.compileWordShiftForD(ctx, r, left = true) ++
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List(MLine.indexedX(STD, Constant.Zero))
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case 1 =>
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handleInPlaceModification(ctx, l, 1, M6809Buitins.compileByteShiftForB(ctx, r, left = true))
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case 2 =>
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handleInPlaceModification(ctx, l, 2, M6809Buitins.compileWordShiftForD(ctx, r, left = true))
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}
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case "<<'=" => ???
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case ">>=" =>
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val (l, r, size) = assertArithmeticAssignmentLike(ctx, params)
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// TODO: optimize shifts directly in memory
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size match {
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case 1 => compileAddressToX(ctx, l) ++
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List(MLine.indexedX(LDB, Constant.Zero)) ++
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M6809Buitins.compileByteShiftForB(ctx, r, left = false) ++
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List(MLine.indexedX(STB, Constant.Zero))
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case 2 => compileAddressToX(ctx, l) ++
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List(MLine.indexedX(LDD, Constant.Zero)) ++
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M6809Buitins.compileWordShiftForD(ctx, r, left = false) ++
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List(MLine.indexedX(STD, Constant.Zero))
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case 1 => handleInPlaceModification(ctx, l, 1, M6809Buitins.compileByteShiftForB(ctx, r, left = false))
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case 2 => handleInPlaceModification(ctx, l, 2, M6809Buitins.compileWordShiftForD(ctx, r, left = false))
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}
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case ">>'=" => ???
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case ">>>>=" => ???
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@ -547,6 +544,11 @@ object M6809ExpressionCompiler extends AbstractExpressionCompiler[MLine] {
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else lines
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}
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def stashXIfNeeded(ctx: CompilationContext, lines: List[MLine]): List[MLine] = {
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if (lines.exists(_.changesRegister(M6809Register.X))) MLine.pp(PSHS, M6809Register.X) :: (lines :+ MLine.pp(PULS, M6809Register.X))
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else lines
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}
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def storeB(ctx: CompilationContext, target: LhsExpression): List[MLine] = {
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target match {
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case VariableExpression(name) =>
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@ -642,6 +644,29 @@ object M6809ExpressionCompiler extends AbstractExpressionCompiler[MLine] {
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}
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}
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def handleInPlaceModification(ctx: CompilationContext, l: LhsExpression, size: Int, r: List[MLine]): List[MLine] = {
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compileAddressToX(ctx, l) match {
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case List(MLine0(LDX, Immediate, addr)) =>
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size match {
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case 1 => List(MLine.absolute(LDB, addr)) ++ r ++ List(MLine.absolute(STB, addr))
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case 2 => List(MLine.absolute(LDD, addr)) ++ r ++ List(MLine.absolute(STD, addr))
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}
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case lc =>
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size match {
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case 1 =>
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lc ++
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List(MLine.indexedX(LDB, Constant.Zero)) ++
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stashXIfNeeded(ctx, r) ++
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List(MLine.indexedX(STB, Constant.Zero))
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case 2 =>
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lc ++
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List(MLine.indexedX(LDD, Constant.Zero)) ++
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stashXIfNeeded(ctx, r) ++
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List(MLine.indexedX(LDD, Constant.Zero))
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}
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}
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}
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private def compileTransitiveRelation(ctx: CompilationContext,
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operator: String,
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