diff --git a/CHANGELOG.md b/CHANGELOG.md
index fd58d197..cd072ff4 100644
--- a/CHANGELOG.md
+++ b/CHANGELOG.md
@@ -26,6 +26,8 @@
 
 * Fixed several serious bugs related to cartridge-based targets.
 
+* 6502: Few minor optimization improvements.
+
 ## 0.3.6
 
 * **Breaking change!**
diff --git a/src/main/scala/millfork/assembly/mos/opt/AlwaysGoodOptimizations.scala b/src/main/scala/millfork/assembly/mos/opt/AlwaysGoodOptimizations.scala
index ecddee06..863560cb 100644
--- a/src/main/scala/millfork/assembly/mos/opt/AlwaysGoodOptimizations.scala
+++ b/src/main/scala/millfork/assembly/mos/opt/AlwaysGoodOptimizations.scala
@@ -1583,6 +1583,18 @@ object AlwaysGoodOptimizations {
       (Elidable & HasOpcode(ANC) & MatchImmediate(1)) ~~> { (lines, ctx) =>
       lines.init.tail :+ AssemblyLine.immediate(ANC, CompoundConstant(MathOperator.And, ctx.get[Constant](0), ctx.get[Constant](1)))
     },
+    (Elidable & HasOpcode(ROR) & HasAddrMode(Implied)) ~
+      (Linear & Not(ChangesA) & Not(ReadsNOrZ) & Not(ReadsC) & Not(ReadsA)).* ~
+      (HasOpcodeIn(AND, ANC) & MatchNumericImmediate(1)) ~
+      Where(ctx => ctx.get[Int](1).&(0x80) == 0)~~> { (lines, ctx) =>
+      lines.head.copy(opcode = LSR) :: lines.tail
+    },
+    (Elidable & HasOpcode(ROL) & HasAddrMode(Implied)) ~
+      (Linear & Not(ChangesA) & Not(ReadsNOrZ) & Not(ReadsC) & Not(ReadsA)).* ~
+      (HasOpcodeIn(AND, ANC) & MatchNumericImmediate(1)) ~
+      Where(ctx => ctx.get[Int](1).&(1) == 0)~~> { (lines, ctx) =>
+      lines.head.copy(opcode = ASL) :: lines.tail
+    },
   )
 
   val SimplifiableIndexChanging = new RuleBasedAssemblyOptimization("Simplifiable index changing",