Z80: Intel syntax support

docs/api/command-line.md

@@ -26,10 +26,6 @@ no extension for BBC micro program file,
 
 * `-s` – Generate also the assembly output. It is not compatible with any assembler, but it serves purely informational purpose. The file has the same nam as the output file and the extension is `.asm`.
 
-* `-foutput_intel_syntax`, `-foutput_zilog_syntax` –
-Choose syntax for assembly output on 8080-like targets.
-`.ini` equivalent: `output_intel_syntax`. Default: Intel (true) on Intel 8080, Zilog (false) otherwise.
-
 * `-g` – Generate also the label file. The label file contains labels with their addresses, with duplicates removed. It can be loaded into the monitor of the Vice emulator for debugging purposes. The file has the same name as the output file and the extension is `.lbl`.
 
 * `-I  <dir>;<dir>` – The include directories. The current working directory is also an include directory. Those directories are searched for modules and platform definitions.
@@ -40,6 +36,17 @@ Choose syntax for assembly output on 8080-like targets.
 
 * `-D <feature>=<value>` – Defines a feature value for the preprocessor.
 
+* `-finput_intel_syntax`, `-finput_zilog_syntax` –
+Choose syntax for assembly sources on 8080-like targets.
+Can be overridden by the source file itself using `#pragma`.
+`.ini` equivalent: `input_intel_syntax`. Default: Intel (true) on Intel 8080, Zilog (false) otherwise.
+
+* `-foutput_intel_syntax`, `-foutput_zilog_syntax` –
+Choose syntax for assembly output on 8080-like targets.
+`.ini` equivalent: `output_intel_syntax`. Default: Intel (true) on Intel 8080, Zilog (false) otherwise.
+
+* `--syntax=intel`, `--syntax=zilog` – sets both previous options at once
+
 ## Verbosity options
 
  * `-q` – Suppress all messages except for errors.

docs/api/getting-started.md

@@ -48,7 +48,7 @@ You may be also interested in the following:
 * `-fipo` – enable interprocedural optimization
 
 * `-s` – additionally generate assembly output
-(if targeting Intel 8080, use `-foutput_intel_syntax` or `-foutput_zilog_syntax` to choose the preferred output syntax)
+(if targeting Intel 8080, use `--syntax=intel` or `--syntax=zilog` to choose the preferred assembly syntax)
 
 * `-g` – additionally generate a label file, in format compatible with VICE emulator
 

docs/lang/literals.md

@@ -14,6 +14,9 @@ Octal: `0o172`
 
 Hexadecimal: `$D323`, `0x2a2`
 
+When using Intel syntax for inline assembly, another hexadecimal syntax is available: `0D323H`, `2a2h`.
+It is not allowed in any other places.
+
 ## String literals
 
 String literals can be used as either array initializers or expressions of type `pointer`.

docs/lang/preprocessor.md

@@ -103,4 +103,12 @@ To use such value in other files, consider this:
 
     #use WIDESCREEN
     const byte is_widescreen = WIDESCREEN
+    
+### `#pragma`
+
+Changes the behaviour of the parser for the current file.
+
+ * `#pragma intel_syntax` – interpret assembly using Intel syntax
+ 
+ * `#pragma zilog_syntax` – interpret assembly using Zilog syntax