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Z80: fix assembly output

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This commit is contained in:
Karol Stasiak 2018-12-29 20:00:40 +01:00
parent b0e20ade0f
commit fca2700787
1 changed files with 4 additions and 0 deletions
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4
src/main/scala/millfork/assembly/z80/ZLine.scala
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@ -337,6 +337,10 @@ case class ZLine(opcode: ZOpcode.Value, registers: ZRegisters, parameter: Consta
case LABEL => parameter.toString + ":"
case RST => s" RST $parameter"
case IM => s" IM $parameter"
case IN_IMM => s" IN A,($parameter)"
case IN_C => s" IN A,(C)"
case OUT_IMM => s" OUT ($parameter),A"
case OUT_C => s" OUT (C),a"
case EX_AF_AF => " EX AF,AF'"
case EX_DE_HL => " EX DE,HL"
case LD_AHLI => " LD A,(HLI)"