mirror of
https://github.com/KarolS/millfork.git
synced 2024-08-16 05:28:54 +00:00
333 lines
6.0 KiB
Plaintext
333 lines
6.0 KiB
Plaintext
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#if not(ARCH_I80)
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#warn i80_math module should be used only on 8080-like targets
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#endif
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#pragma zilog_syntax
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#if CPUFEATURE_Z80_NEXT
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inline asm byte __mul_u8u8u8() {
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? LD E,A
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? MUL
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? LD A, E
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? RET
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}
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#elseif CPUFEATURE_Z80 || CPUFEATURE_GAMEBOY
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//A = A * D
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noinline asm byte __mul_u8u8u8() {
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? LD E,A
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? LD A, 0
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? JR __mul_u8u8u8_start
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__mul_u8u8u8_add:
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? ADD A,E
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__mul_u8u8u8_loop:
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? SLA E
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__mul_u8u8u8_start:
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? SRL D
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? JR C, __mul_u8u8u8_add
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? JR NZ, __mul_u8u8u8_loop
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? RET
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}
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#else
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noinline asm byte __mul_u8u8u8() {
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? LD E,A
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? LD C, 0
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? JP __mul_u8u8u8_start
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__mul_u8u8u8_add:
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? LD A,C
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? ADD A,E
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? LD C,A
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__mul_u8u8u8_loop:
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? LD A,E
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? ADD A,A
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? LD E,A
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__mul_u8u8u8_start:
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? OR A
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? LD A,D
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? RRA
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? LD D,A
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? JP C, __mul_u8u8u8_add
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? OR A
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? JP NZ, __mul_u8u8u8_loop
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? LD A,C
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? RET
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}
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#endif
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noinline asm void __divmod_u16u8u16u8() {
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? XOR A
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? LD B, 16
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__divmod_u16u8u16u8_loop:
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? ADD HL,HL
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? RLA
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#if CPUFEATURE_Z80 || CPUFEATURE_GAMEBOY
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? JR C, __divmod_u16u8u16u8_overflow
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#else
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? JP C, __divmod_u16u8u16u8_overflow
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#endif
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? CP D
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#if CPUFEATURE_Z80 || CPUFEATURE_GAMEBOY
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? JR C, __divmod_u16u8u16u8_skip
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#else
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? JP C, __divmod_u16u8u16u8_skip
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#endif
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__divmod_u16u8u16u8_overflow:
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? SUB D
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? INC L
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__divmod_u16u8u16u8_skip:
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#if CPUFEATURE_Z80
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? DJNZ __divmod_u16u8u16u8_loop
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#elseif CPUFEATURE_GAMEBOY
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? DEC B
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? JR NZ, __divmod_u16u8u16u8_loop
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#else
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? DEC B
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? JP NZ, __divmod_u16u8u16u8_loop
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#endif
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? RET
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}
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noinline asm word __mul_u16u8u16() {
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? LD HL,0
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? LD B,8
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__mul_u16u8u16_loop:
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? ADD HL,HL
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? ADC A,A
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#if CPUFEATURE_Z80 || CPUFEATURE_GAMEBOY
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? JR NC,__mul_u16u8u16_skip
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#else
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? JP NC,__mul_u16u8u16_skip
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#endif
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? ADD HL,DE
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__mul_u16u8u16_skip:
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#if CPUFEATURE_Z80
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? DJNZ __mul_u16u8u16_loop
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#elseif CPUFEATURE_GAMEBOY
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? DEC B
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? JR NZ,__mul_u16u8u16_loop
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#else
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? DEC B
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? JP NZ,__mul_u16u8u16_loop
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#endif
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? RET
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}
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#if CPUFEATURE_Z80 || CPUFEATURE_GAMEBOY
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noinline asm word __mul_u16u16u16() {
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LD HL,0
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LD A,16
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__mul_u16u16u16_loop:
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ADD HL,HL
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RL E
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RL D
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JR NC,__mul_u16u16u16_skip
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ADD HL,BC
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__mul_u16u16u16_skip:
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DEC A
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JR NZ,__mul_u16u16u16_loop
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RET
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}
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#else
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noinline asm word __mul_u16u16u16() {
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ld hl,0
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CALL __mul_u16u16u16_q
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CALL __mul_u16u16u16_q
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CALL __mul_u16u16u16_q
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JP __mul_u16u16u16_q
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}
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noinline asm word __mul_u16u16u16_q(word hl) {
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CALL __mul_u16u16u16_s
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CALL __mul_u16u16u16_s
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CALL __mul_u16u16u16_s
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JP __mul_u16u16u16_s
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}
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noinline asm word __mul_u16u16u16_s(word hl) {
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ADD HL,HL
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LD A,E
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ADD A,E
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LD E,A
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LD A,D
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ADC A,D
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LD D,A
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RET NC
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ADD HL,BC
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RET
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}
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#endif
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#if CPUFEATURE_Z80
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// HL/DE = DE rem HL
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noinline asm word __divmod_u16u16u16u16() {
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LD A,H
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LD C,L
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LD HL,0
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LD B,16
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__divmod_u16u16u16u16_loop:
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#if CPUFEATURE_Z80_ILLEGALS
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SLL C
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#else
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SCF
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RL C
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#endif
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RLA
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ADC HL,HL
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SBC HL,DE
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JR NC,__divmod_u16u16u16u16_skip
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ADD HL,DE
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DEC C
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__divmod_u16u16u16u16_skip:
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DJNZ __divmod_u16u16u16u16_loop
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LD D,A
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LD E,C
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RET
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}
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#elseif CPUFEATURE_8080
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// HL/DE = DE rem HL
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// ABI could be changed, but the optimizer relies on it
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asm word __divmod_u16u16u16u16() {
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? LD B,D
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? LD C,E
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? LD DE,0
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#if OPTIMIZE_FOR_SPEED
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? CALL __divmod_u16u16u16u16_u
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? CALL __divmod_u16u16u16u16_u
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? CALL __divmod_u16u16u16u16_u
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? CALL __divmod_u16u16u16u16_u
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? CALL __divmod_u16u16u16u16_u
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? CALL __divmod_u16u16u16u16_u
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? CALL __divmod_u16u16u16u16_u
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? CALL __divmod_u16u16u16u16_u
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? CALL __divmod_u16u16u16u16_u
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? CALL __divmod_u16u16u16u16_u
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? CALL __divmod_u16u16u16u16_u
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? CALL __divmod_u16u16u16u16_u
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? CALL __divmod_u16u16u16u16_u
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? CALL __divmod_u16u16u16u16_u
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? CALL __divmod_u16u16u16u16_u
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? CALL __divmod_u16u16u16u16_u
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#else
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? CALL __divmod_u16u16u16u16_q
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? CALL __divmod_u16u16u16u16_q
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? CALL __divmod_u16u16u16u16_q
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? CALL __divmod_u16u16u16u16_q
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#endif
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? EX DE,HL
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? RET
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}
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#if not(OPTIMIZE_FOR_SPEED)
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asm void __divmod_u16u16u16u16_q(){
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? CALL __divmod_u16u16u16u16_u
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? CALL __divmod_u16u16u16u16_u
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? CALL __divmod_u16u16u16u16_u
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? JP __divmod_u16u16u16u16_u
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}
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#endif
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noinline asm void __divmod_u16u16u16u16_u(){
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ADD HL,HL
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INC L
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LD A,E
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RLA
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LD E,A
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LD A,D
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RLA
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LD D,A
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LD A,E
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SUB C
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LD E,A
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LD A,D
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SBC A,B
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LD D,A
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RET NC
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EX DE,HL
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ADD HL, BC
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EX DE,HL
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DEC L
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RET
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}
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#elseif CPUFEATURE_GAMEBOY
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// HL/DE = DE rem HL
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// ABI could be changed, but the optimizer relies on it
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asm word __divmod_u16u16u16u16() {
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? LD B,D
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? LD C,E
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? LD D,H
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? LD E,L
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? LD HL,0
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#if OPTIMIZE_FOR_SPEED
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? CALL __divmod_u16u16u16u16_u
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? CALL __divmod_u16u16u16u16_u
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? CALL __divmod_u16u16u16u16_u
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? CALL __divmod_u16u16u16u16_u
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? CALL __divmod_u16u16u16u16_u
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? CALL __divmod_u16u16u16u16_u
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? CALL __divmod_u16u16u16u16_u
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? CALL __divmod_u16u16u16u16_u
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? CALL __divmod_u16u16u16u16_u
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? CALL __divmod_u16u16u16u16_u
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? CALL __divmod_u16u16u16u16_u
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? CALL __divmod_u16u16u16u16_u
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? CALL __divmod_u16u16u16u16_u
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? CALL __divmod_u16u16u16u16_u
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? CALL __divmod_u16u16u16u16_u
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? JP __divmod_u16u16u16u16_u
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#else
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? CALL __divmod_u16u16u16u16_q
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? CALL __divmod_u16u16u16u16_q
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? CALL __divmod_u16u16u16u16_q
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? JP __divmod_u16u16u16u16_q
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#endif
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}
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#if not(OPTIMIZE_FOR_SPEED)
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asm void __divmod_u16u16u16u16_q(){
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? CALL __divmod_u16u16u16u16_u
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? CALL __divmod_u16u16u16u16_u
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? CALL __divmod_u16u16u16u16_u
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? JP __divmod_u16u16u16u16_u
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}
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#endif
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noinline asm void __divmod_u16u16u16u16_u() {
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SCF
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RL E
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RL D
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RL L
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RL H
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LD A,L
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SUB C
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LD L,A
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LD A,H
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SBC A,B
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LD H,A
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RET NC
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ADD HL,BC
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DEC E
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RET
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}
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#else
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#warn No implementation of 16-bit division for this target
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#endif
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