6502
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mre-mos6502
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implement stz

This commit is contained in:
Sam M W 2024-04-24 14:38:29 +01:00
parent 2c26ebb00a
commit 0f1c01ce60
2 changed files with 8 additions and 0 deletions
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3
src/cpu.rs
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@ -580,6 +580,9 @@ impl<M: Bus, V: Variant> CPU<M, V> {
(Instruction::STY, OpInput::UseAddress(addr)) => {
self.memory.set_byte(addr, self.registers.index_y);
}
(Instruction::STZ, OpInput::UseAddress(addr)) => {
self.memory.set_byte(addr, 0);
}
(Instruction::TAX, OpInput::UseImplied) => {
let val = self.registers.accumulator;

5
src/instruction.rs
View File

@ -100,6 +100,7 @@ pub enum Instruction {
STA, // STore Accumulator............. | .. ..... M = A
STX, // STore X register.............. | .. ..... M = X
STY, // STore Y register.............. | .. ..... M = Y
STZ, // STore Zero.................... | .. ..... M = Y
TAX, // Transfer Accumulator to X..... | N. ...Z. X = A
TAY, // Transfer Accumulator to Y..... | N. ...Z. Y = A
TSX, // Transfer Stack pointer to X... | N. ...Z. X = S
@ -494,6 +495,10 @@ impl crate::Variant for Cmos6502 {
0x3a => Some((Instruction::DEC, AddressingMode::Accumulator)),
0x6c => Some((Instruction::JMP, AddressingMode::Indirect)),
0x80 => Some((Instruction::BRA, AddressingMode::Relative)),
0x64 => Some((Instruction::STZ, AddressingMode::ZeroPage)),
0x74 => Some((Instruction::STZ, AddressingMode::ZeroPageX)),
0x9c => Some((Instruction::STZ, AddressingMode::Absolute)),
0x9e => Some((Instruction::STZ, AddressingMode::AbsoluteX)),
_ => Nmos6502::decode(opcode),
}
}