From bf543e2fbeeaba7c7165841ac9b68fb4bfbf0e52 Mon Sep 17 00:00:00 2001 From: Sam M W Date: Sun, 23 Oct 2022 06:52:27 +0100 Subject: [PATCH 1/3] add failing test --- src/cpu.rs | 9 +++++++++ 1 file changed, 9 insertions(+) diff --git a/src/cpu.rs b/src/cpu.rs index 74236df..6e68b5a 100644 --- a/src/cpu.rs +++ b/src/cpu.rs @@ -837,6 +837,15 @@ mod tests { use super::*; use num::range_inclusive; + #[test] + fn dont_panic_for_overflow() { + let mut cpu = CPU::new(); + cpu.add_with_carry(-128); + assert_eq!(cpu.registers.accumulator, -128); + cpu.add_with_carry(-128); + assert_eq!(cpu.registers.accumulator, 0); + } + #[cfg_attr(feature = "decimal_mode", test)] fn decimal_add_test() { let mut cpu = CPU::new(); From 2bcbfa63b5968494fb54e2498915cbc598237744 Mon Sep 17 00:00:00 2001 From: Sam M W Date: Sun, 23 Oct 2022 07:01:26 +0100 Subject: [PATCH 2/3] fix panic --- src/cpu.rs | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/src/cpu.rs b/src/cpu.rs index 6e68b5a..e64aed1 100644 --- a/src/cpu.rs +++ b/src/cpu.rs @@ -629,7 +629,8 @@ impl CPU { let over = ((nc == 0 && value < 0) || (nc == 1 && value < -1)) && a_before >= 0 && a_after < 0; - let under = (a_before < 0) && (-value - nc < 0) && a_after >= 0; + let under = + (a_before < 0) && (0i8.wrapping_sub(value).wrapping_sub(nc) < 0) && a_after >= 0; let did_overflow = over || under; From c2e77b5f5226f759a6303d429eb419d071f8af54 Mon Sep 17 00:00:00 2001 From: Sam M W Date: Sun, 23 Oct 2022 07:04:15 +0100 Subject: [PATCH 3/3] also test subtractions --- src/cpu.rs | 5 +++++ 1 file changed, 5 insertions(+) diff --git a/src/cpu.rs b/src/cpu.rs index e64aed1..69366c1 100644 --- a/src/cpu.rs +++ b/src/cpu.rs @@ -845,6 +845,11 @@ mod tests { assert_eq!(cpu.registers.accumulator, -128); cpu.add_with_carry(-128); assert_eq!(cpu.registers.accumulator, 0); + + cpu.subtract_with_carry(-128); + assert_eq!(cpu.registers.accumulator, -128); + cpu.subtract_with_carry(-128); + assert_eq!(cpu.registers.accumulator, 0); } #[cfg_attr(feature = "decimal_mode", test)]