From 3563f6362c495b1299028069a42209f1db75cfb8 Mon Sep 17 00:00:00 2001
From: Alex Weisberger <alex.m.weisberger@gmail.com>
Date: Wed, 1 Oct 2014 18:40:58 -0400
Subject: [PATCH] get immediate operand when opcode is ADC Immediate

---
 src/instruction.rs |  4 +++-
 src/machine.rs     | 14 +++++++-------
 2 files changed, 10 insertions(+), 8 deletions(-)

diff --git a/src/instruction.rs b/src/instruction.rs
index 44025df..fe4c93c 100644
--- a/src/instruction.rs
+++ b/src/instruction.rs
@@ -48,7 +48,9 @@ pub enum Instruction
       //                                  NV BDIZC A X Y S PC M
       //
       //                                | outputs               | inputs
-{ ADC // ADd with Carry................ | NV ...ZC A            = A + M + C
+{ 
+  ADC(i8) // ADd with Carry................ | NV ...ZC A            = A + M + C
+
 , AND // logical AND (bitwise)......... | N. ...Z. A            = A && M
 , ASL // Arithmetic Shift Left......... | N. ...ZC A            = M << 1
 , BCC // Branch if Carry Clear......... | .. .....         PC   = !C
diff --git a/src/machine.rs b/src/machine.rs
index 775162b..5886425 100644
--- a/src/machine.rs
+++ b/src/machine.rs
@@ -50,27 +50,27 @@ impl Machine {
     	*self = Machine::new();
     }
 
-    pub fn fetch_instruction(&mut self) -> u8  {
+    pub fn fetch_instruction(&mut self) -> i8  {
         let instr = self.memory.get_byte(&self.registers.program_counter);
 
         // Will need smarter logic to fetch the correct number of bytes 
         // for instruction
         self.registers.program_counter = self.registers.program_counter +  AddressDiff(1);
-        instr                    
-    }
+        instr as i8
+    } 
 
-    pub fn decode_instruction(&mut self, raw_instruction: u8) -> Instruction {
+    pub fn decode_instruction(&mut self, raw_instruction: i8) -> Instruction {
         match raw_instruction {
-            0x69 => ADC,
+            0x69 => ADC(self.fetch_instruction()),
             _    => NOP 
         }
     }    
         
     pub fn execute_instruction(&mut self, instruction: Instruction) {
         match instruction {
-            ADC => { 
+            ADC(immediate) => { 
                 println!("executing add with carry");
-                self.add_with_carry(1);
+                self.add_with_carry(immediate);
             },
             NOP => {
                 println!("nop instr");